fix 2

cache/Project1/Proj1-2/Proj1-2/src/NewCache.cc

@@ -8,7 +8,7 @@ Config::Config(char *argv[])
     L1_assoc = atoi(argv[4]);
     L2_assoc = atoi(argv[5]);
     victimCacheSize = atoi(argv[6]);
-    trace_file = std::string(argv[7]);
+    fileName = std::string(argv[7]);
 }
 
 void Config::printConfig()
@@ -21,7 +21,7 @@ void Config::printConfig()
     cout << setw(30) << "Victim_Cache_SIZE:" << this->victimCacheSize << endl;
     cout << setw(30) << "L2_SIZE:" << this->L2_size << endl;
     cout << setw(30) << "L2_ASSOC:" << this->L2_assoc << endl;
-    cout << setw(30) << "trace_file:" << this->trace_file << endl;
+    cout << setw(30) << "trace_file:" << this->fileName << endl;
     cout << "===================================" << endl;
 }
 
@@ -30,21 +30,20 @@ NewCache::NewCache(Config *config)
     this->config = config;
     if (config->L2_size > 0)
     {
-        Cache *L2 = new Cache(config->blockSize, config->L2_size, config->L2_assoc, 0, "L2");
+        l2 = new Cache(config->blockSize, config->L2_size, config->L2_assoc, 0, "L2");
-        cache = new Cache(config->blockSize, config->L1_size, config->L1_assoc, config->victimCacheSize, L2, "L1");
+        l1 = new Cache(config->blockSize, config->L1_size, config->L1_assoc, config->victimCacheSize, l2, "L1");
-        l1 = cache, l2 = L2;
+        isL2Exist = config->L2_size, isVictimExist = config->victimCacheSize;
-        Has2 = config->L2_size, HasV = config->victimCacheSize;
 
     }
     else
     {
-        cache = new Cache(config->blockSize, config->L1_size, config->L1_assoc, config->victimCacheSize, nullptr, "L1");
+        l2 = nullptr;
-        l1 = cache, l2 = nullptr;
+        l1 = new Cache(config->blockSize, config->L1_size, config->L1_assoc, config->victimCacheSize, nullptr, "L1");
-        Has2 = config->L2_size, HasV = config->victimCacheSize;
+        isL2Exist = config->L2_size, isVictimExist = config->victimCacheSize;
     }
 }
 
-void NewCache::printMonitor()
+void NewCache::printNewCache()
 {
     cout << "====== Simulation results (raw) ======" << endl;
     cout << setw(38) << "a. number of L1 reads:               " << this->l1->r << endl;
@@ -53,14 +52,14 @@ void NewCache::printMonitor()
     cout << setw(38) << "d. number of L1 write misses:        " << this->l1->wm << endl;
     cout << setw(38) << "e. L1 miss rate:                     " << fixed << setprecision(4) << this->l1->getMR() << endl;
     cout << setw(38) << "f. number of swaps:                  " << this->l1->ex << endl;
-    cout << setw(38) << "g. number of victim cache writeback: " << (this->HasV ? this->l1->wb : 0) << endl;
+    cout << setw(38) << "g. number of victim cache writeback: " << (this->isVictimExist ? this->l1->wb : 0) << endl;
-    if (this->Has2)
+    if (this->isL2Exist)
     {
         cout << setw(38) << "h. number of L2 reads:               " << this->l2->r << endl;
         cout << setw(38) << "i. number of L2 read misses:         " << this->l2->rm << endl;
         cout << setw(38) << "j. number of L2 writes:              " << this->l2->w << endl;
         cout << setw(38) << "k. number of L2 write misses:        " << this->l2->wm << endl;
-        cout << setw(38) << "l. L2 miss rate:                     " << fixed << setprecision((this->Has2) ? 4 : 0) << this->l2->getMR2() << endl;
+        cout << setw(38) << "l. L2 miss rate:                     " << fixed << setprecision((this->isL2Exist) ? 4 : 0) << this->l2->getMR2() << endl;
         cout << setw(38) << "m. number of L2 writebacks:          " << this->l2->wb << endl;
         cout << setw(38) << "n. total memory traffic:             " << (this->l2->rm + this->l2->wm + this->l2->wb) << endl;
         cout << "==== Simulation results (performance) ====" << endl;

cache/Project1/Proj1-2/Proj1-2/src/NewCache.h

@@ -16,7 +16,7 @@ public:
     int L1_assoc;
     int L2_assoc;
     int victimCacheSize;
-    string trace_file;
+    string fileName;
 
     Config(char *argv[]);
     void printConfig();
@@ -26,11 +26,10 @@ class NewCache
 {
 public:
     Config *config;
-    Cache *cache;
 
     Cache *l1, *l2;
-    bool Has2, HasV;  
+    bool isL2Exist, isVictimExist;  
 
     NewCache(Config *config);
-    void printMonitor();
+    void printNewCache();
 };

cache/Project1/Proj1-2/Proj1-2/src/cache.cc

@@ -80,7 +80,7 @@ void CacheConfig::setupTIO()
     // vim = ((1<<vi)-1) << vo;
 }
 
-CacheTIO CacheConfig::VictimAddrParser(uint32_t addr)
+CacheIndex CacheConfig::VictimAddrParser(uint32_t addr)
 {
     uint32_t offset = addr & vom;
     // uint32_t index = (addr & vim) >> vo;
@@ -88,7 +88,7 @@ CacheTIO CacheConfig::VictimAddrParser(uint32_t addr)
     return {tag, 0, offset, addr};
 }
 
-CacheTIO CacheConfig::AddrParser(uint32_t addr)
+CacheIndex CacheConfig::AddrParser(uint32_t addr)
 {
     uint32_t offset = addr & om;
     uint32_t index = (addr & im) >> o;
@@ -96,16 +96,15 @@ CacheTIO CacheConfig::AddrParser(uint32_t addr)
     return {tag, index, offset, addr};
 }
 
-uint32_t CacheConfig::UnParser(uint32_t tag, CacheTIO tio)
+uint32_t CacheConfig::UnParser(uint32_t tag, CacheIndex tio)
 {
     return (tag << (o + i)) | (tio.index << o) | (tio.offset);
 }
 
-uint32_t CacheConfig::UnParserVic(uint32_t tag, CacheTIO tio)
+uint32_t CacheConfig::UnParserVic(uint32_t tag, CacheIndex tio)
 {
     return (tag << (vo)) | (tio.offset);
 }
-
 Cache::Cache(int blockSize, int s, int assoc, int victimSize, string l, int replicementPolicy, int writePolicy)
 {
 
@@ -323,3 +322,27 @@ void Cache::printCache()
     }
 }
 
+double Cache::getMR()
+{
+    return (double)(rm + wm) / (double)(r + w);
+}
+
+double Cache::getMR2()
+{
+    return (double)(rm) / (double)(r);
+}
+
+double Cache::getAAT()
+{
+    double HT = config.getHT();
+    double MP = config.getMP();
+    double MR = getMR();
+    return HT + (MP * MR);
+}
+void Cache::Read() { r++; }
+void Cache::ReadMiss() { rm++; }
+void Cache::Write() { w++; }
+void Cache::WriteMiss() { wm++; }
+void Cache::WriteBack() { wb++; }
+void Cache::Exchange() { ex++; }
+int Cache::getCommunication() { return rm + wm + wb; }

cache/Project1/Proj1-2/Proj1-2/src/cache.h

@@ -8,7 +8,7 @@
 #include <ostream>
 #include <vector>
 using namespace std;
-struct CacheTIO
+struct CacheIndex
 {
     uint32_t tag, index, offset, rAddr;
 };
@@ -50,10 +50,10 @@ public:
     uint32_t getVictimAs();
     uint32_t getAs();
     void setupTIO();
-    CacheTIO VictimAddrParser(uint32_t addr);
+    CacheIndex VictimAddrParser(uint32_t addr);
-    CacheTIO AddrParser(uint32_t addr);
+    CacheIndex AddrParser(uint32_t addr);
-    uint32_t UnParser(uint32_t tag, CacheTIO tio);
+    uint32_t UnParser(uint32_t tag, CacheIndex tio);
-    uint32_t UnParserVic(uint32_t tag, CacheTIO tio);
+    uint32_t UnParserVic(uint32_t tag, CacheIndex tio);
     int getBlockSize();
     int Size();
     int Assoc();
@@ -70,7 +70,6 @@ struct Block
     bool operator<(const Block &t) const { return lru < t.lru; }
 };
 
-
 class Cache
 {
 public:
@@ -80,10 +79,8 @@ public:
     vector<Block> vc;        // Victim Cache
     string level;
 
-
     Cache *NextCache = nullptr;
 
-
     int r = 0;  // Read Count
     int rm = 0; // Read Miss
     int w = 0;  // Write Count
@@ -91,31 +88,16 @@ public:
     int wb = 0; // Write Back
     int ex = 0; // Exchange (between L1 and Victim)
 
-    void Read() { r++; }
+    void Read();
-    void ReadMiss() { rm++; }
+    void ReadMiss();
-    void Write() { w++; }
+    void Write();
-    void WriteMiss() { wm++; }
+    void WriteMiss();
-    void WriteBack() { wb++; }
+    void WriteBack();
-    void Exchange() { ex++; }
+    void Exchange();
-    int getCommunication() { return rm + wm + wb; }
+    int getCommunication();
-
+    double getMR();
-    double getMR()
+    double getMR2();
-    {
+    double getAAT();
-        return (double)(rm + wm) / (double)(r + w);
-    }
-
-    double getMR2()
-    {
-        return (double)(rm) / (double)(r);
-    }
-
-    double getAAT()
-    {
-        double HT = config.getHT();
-        double MP = config.getMP();
-        double MR = getMR();
-        return HT + (MP * MR);
-    }
 
     
     Cache(int blockSize, int s, int assoc, int victimSize, string l = "L1", int replicementPolicy = LRU, int writePolicy = LFU);

cache/Project1/Proj1-2/Proj1-2/src/main.cc

@@ -19,13 +19,13 @@ int main(int argc, char *argv[])
 
     try
     {
-        ifstream trace("../traces/" + config->trace_file);
+        ifstream trace("../traces/" + config->fileName);
         string line;
         char op;
         unsigned addr;
         while (getline(trace, line) && (istringstream(line) >> op >> hex >> addr))
         {
-            newCache->cache->useCache(addr, op == 'w');
+            newCache->l1->useCache(addr, op == 'w');
         }
         trace.close();
     }
@@ -38,10 +38,10 @@ int main(int argc, char *argv[])
     try
     {
         config->printConfig();
-        newCache->cache->printCache();
+        newCache->l1->printCache();
-        if (newCache->Has2)
+        if (newCache->isL2Exist)
-            (newCache->cache->NextCache)->printCache();
+            newCache->l2->printCache();
-        newCache->printMonitor();
+        newCache->printNewCache();
     }
     catch (...)
     {