diff --git a/cache/Project1/Proj1-2/Proj1-2/src/cache.cc b/cache/Project1/Proj1-2/Proj1-2/src/cache.cc index 24b2069..d0e559b 100644 --- a/cache/Project1/Proj1-2/Proj1-2/src/cache.cc +++ b/cache/Project1/Proj1-2/Proj1-2/src/cache.cc @@ -39,7 +39,7 @@ double CacheConfig::getMP() return 20 + 0.5 * (blockSize / 16.0); } -int CacheConfig::log2_floor(uint32_t x) +int CacheConfig::log2(uint32_t x) { return x == 0 ? -1 : 31 - __builtin_clz(x); } @@ -62,8 +62,8 @@ uint32_t CacheConfig::getAs() void CacheConfig::setupTIO() { // setup t, i, b - o = log2_floor(blockSize); - i = log2_floor(s / (blockSize * assoc)); + o = log2(blockSize); + i = log2(s / (blockSize * assoc)); t = 32 - o - i; om = (1 << o) - 1; @@ -72,7 +72,7 @@ void CacheConfig::setupTIO() if (!victimSize) return; - vo = log2_floor(blockSize); + vo = log2(blockSize); vi = 0; vt = 32 - vo - vi; victimAsso = victimSize / blockSize; @@ -81,7 +81,7 @@ void CacheConfig::setupTIO() // vim = ((1<> vo; @@ -129,7 +129,6 @@ void Cache::useCache(uint32_t rawAddr, bool isWrite) auto addr = config->AddrParser(rawAddr); auto s = &cache[addr.index]; - // Find in Cache auto cl = find_if( s->begin(), s->end(), @@ -140,7 +139,6 @@ void Cache::useCache(uint32_t rawAddr, bool isWrite) if (cl != s->end()) { - // Cache Hit! for (auto &b : (*s)) b.lru += (b.lru < cl->lru); cl->lru = 0; @@ -192,11 +190,8 @@ void Cache::useCache(uint32_t rawAddr, bool isWrite) } else { - // Has Victim Cache: Replace with Victim - // Miss Write or Read Miss, Go to Next Level - // 1. Find it from Victim Cache - auto vaddr = config->VictimAddrParser(rawAddr); + auto vaddr = config->parserVictimAddr(rawAddr); auto vcp = &victimCache; auto vic = find_if( @@ -209,13 +204,12 @@ void Cache::useCache(uint32_t rawAddr, bool isWrite) if (vic != vcp->end()) { - // V. Cache Hit from Victim! auto tmp = *vic; if (cl->valid) { for (auto &b : *vcp) b.lru += (b.lru < tmp.lru); - *vic = {config->VictimAddrParser(config->UnParser(cl->tag, addr)).tag, 0, cl->dirty, true}; + *vic = {config->parserVictimAddr(config->UnParser(cl->tag, addr)).tag, 0, cl->dirty, true}; } for (auto &b : (*s)) @@ -225,17 +219,14 @@ void Cache::useCache(uint32_t rawAddr, bool isWrite) return; } - // X. Victim Cache Miss! isWrite ? writeMiss++ : readMiss++; if (!cl->valid) { if (nextCache != nullptr) { - // 2. Find it from Next Level nextCache->useCache(rawAddr, false); } - // Empty Level 1 for (auto &b : (*s)) b.lru++; *cl = {addr.tag, 0, isWrite, true}; @@ -252,7 +243,6 @@ void Cache::useCache(uint32_t rawAddr, bool isWrite) if (vic == vcp->end()) { - // Vic Full, find one to deprecate vic = max_element( vcp->begin(), vcp->end()); @@ -265,17 +255,15 @@ void Cache::useCache(uint32_t rawAddr, bool isWrite) } } } - // New Victim Cache for (auto &b : *vcp) b.lru++; - *vic = {config->VictimAddrParser(config->UnParser(cl->tag, addr)).tag, 0, cl->dirty, true}; + *vic = {config->parserVictimAddr(config->UnParser(cl->tag, addr)).tag, 0, cl->dirty, true}; for (auto &b : (*s)) b.lru++; *cl = {addr.tag, 0, isWrite, true}; if (nextCache != nullptr) { - // 2. Find it from Next Level nextCache->useCache(rawAddr, false); } } diff --git a/cache/Project1/Proj1-2/Proj1-2/src/cache.h b/cache/Project1/Proj1-2/Proj1-2/src/cache.h index c53740a..9397d20 100644 --- a/cache/Project1/Proj1-2/Proj1-2/src/cache.h +++ b/cache/Project1/Proj1-2/Proj1-2/src/cache.h @@ -47,12 +47,12 @@ public: double getHT(); double getHT2(); double getMP(); - int log2_floor(uint32_t x); + int log2(uint32_t x); uint32_t getMaxIndex(); uint32_t getVictimAs(); uint32_t getAs(); void setupTIO(); - CacheIndex VictimAddrParser(uint32_t addr); + CacheIndex parserVictimAddr(uint32_t addr); CacheIndex AddrParser(uint32_t addr); uint32_t UnParser(uint32_t tag, CacheIndex tio); uint32_t UnParserVic(uint32_t tag, CacheIndex tio); diff --git a/cache/Project1/Proj1-2/Proj1-2/src/main.o b/cache/Project1/Proj1-2/Proj1-2/src/main.o index c9b07ab..47a97fe 100644 Binary files a/cache/Project1/Proj1-2/Proj1-2/src/main.o and b/cache/Project1/Proj1-2/Proj1-2/src/main.o differ diff --git a/cache/Project1/Proj1-2/Proj1-2/src/sim_cache b/cache/Project1/Proj1-2/Proj1-2/src/sim_cache index 9d3bffa..f3cec8b 100644 Binary files a/cache/Project1/Proj1-2/Proj1-2/src/sim_cache and b/cache/Project1/Proj1-2/Proj1-2/src/sim_cache differ