init
This commit is contained in:
LYC
commit
64b237d49b
Binary file not shown.
File diff suppressed because it is too large
Load Diff
File diff suppressed because it is too large
Load Diff
File diff suppressed because it is too large
Load Diff
File diff suppressed because it is too large
Load Diff
File diff suppressed because it is too large
Load Diff
File diff suppressed because it is too large
Load Diff
File diff suppressed because it is too large
Load Diff
File diff suppressed because it is too large
Load Diff
Binary file not shown.
|
|
@ -0,0 +1,135 @@
|
|||
COMMAND
|
||||
./sim bimodal 7 0 0 gcc_trace.txt
|
||||
OUTPUT
|
||||
number of predictions: 2000000
|
||||
number of mispredictions: 532970
|
||||
misprediction rate: 26.65%
|
||||
FINAL BIMODAL CONTENTS
|
||||
0 3
|
||||
1 0
|
||||
2 3
|
||||
3 2
|
||||
4 2
|
||||
5 3
|
||||
6 3
|
||||
7 0
|
||||
8 1
|
||||
9 3
|
||||
10 1
|
||||
11 0
|
||||
12 0
|
||||
13 1
|
||||
14 2
|
||||
15 3
|
||||
16 1
|
||||
17 1
|
||||
18 3
|
||||
19 1
|
||||
20 0
|
||||
21 2
|
||||
22 0
|
||||
23 0
|
||||
24 0
|
||||
25 2
|
||||
26 2
|
||||
27 3
|
||||
28 0
|
||||
29 0
|
||||
30 1
|
||||
31 1
|
||||
32 3
|
||||
33 3
|
||||
34 2
|
||||
35 2
|
||||
36 2
|
||||
37 0
|
||||
38 0
|
||||
39 2
|
||||
40 3
|
||||
41 0
|
||||
42 0
|
||||
43 1
|
||||
44 0
|
||||
45 0
|
||||
46 0
|
||||
47 3
|
||||
48 2
|
||||
49 2
|
||||
50 0
|
||||
51 0
|
||||
52 0
|
||||
53 3
|
||||
54 2
|
||||
55 3
|
||||
56 3
|
||||
57 3
|
||||
58 0
|
||||
59 1
|
||||
60 0
|
||||
61 0
|
||||
62 2
|
||||
63 2
|
||||
64 1
|
||||
65 3
|
||||
66 2
|
||||
67 1
|
||||
68 0
|
||||
69 0
|
||||
70 0
|
||||
71 3
|
||||
72 0
|
||||
73 0
|
||||
74 1
|
||||
75 1
|
||||
76 3
|
||||
77 3
|
||||
78 0
|
||||
79 2
|
||||
80 0
|
||||
81 1
|
||||
82 1
|
||||
83 0
|
||||
84 0
|
||||
85 0
|
||||
86 2
|
||||
87 2
|
||||
88 0
|
||||
89 0
|
||||
90 0
|
||||
91 0
|
||||
92 0
|
||||
93 3
|
||||
94 0
|
||||
95 2
|
||||
96 3
|
||||
97 2
|
||||
98 0
|
||||
99 0
|
||||
100 0
|
||||
101 3
|
||||
102 2
|
||||
103 0
|
||||
104 0
|
||||
105 3
|
||||
106 0
|
||||
107 2
|
||||
108 1
|
||||
109 0
|
||||
110 0
|
||||
111 0
|
||||
112 3
|
||||
113 1
|
||||
114 3
|
||||
115 3
|
||||
116 0
|
||||
117 1
|
||||
118 3
|
||||
119 3
|
||||
120 0
|
||||
121 1
|
||||
122 0
|
||||
123 0
|
||||
124 0
|
||||
125 1
|
||||
126 0
|
||||
127 0
|
||||
File diff suppressed because it is too large
Load Diff
|
|
@ -0,0 +1,39 @@
|
|||
COMMAND
|
||||
./sim bimodal 5 0 0 jpeg_trace.txt
|
||||
OUTPUT
|
||||
number of predictions: 2000000
|
||||
number of mispredictions: 214222
|
||||
misprediction rate: 10.71%
|
||||
FINAL BIMODAL CONTENTS
|
||||
0 3
|
||||
1 2
|
||||
2 0
|
||||
3 0
|
||||
4 1
|
||||
5 3
|
||||
6 1
|
||||
7 2
|
||||
8 2
|
||||
9 3
|
||||
10 0
|
||||
11 0
|
||||
12 0
|
||||
13 0
|
||||
14 3
|
||||
15 0
|
||||
16 2
|
||||
17 1
|
||||
18 2
|
||||
19 2
|
||||
20 0
|
||||
21 2
|
||||
22 0
|
||||
23 2
|
||||
24 3
|
||||
25 1
|
||||
26 3
|
||||
27 3
|
||||
28 0
|
||||
29 3
|
||||
30 3
|
||||
31 1
|
||||
|
|
@ -0,0 +1,71 @@
|
|||
COMMAND
|
||||
./sim bimodal 6 0 0 perl_trace.txt
|
||||
OUTPUT
|
||||
number of predictions: 2000000
|
||||
number of mispredictions: 530070
|
||||
misprediction rate: 26.50%
|
||||
FINAL BIMODAL CONTENTS
|
||||
0 2
|
||||
1 0
|
||||
2 0
|
||||
3 2
|
||||
4 2
|
||||
5 0
|
||||
6 2
|
||||
7 3
|
||||
8 0
|
||||
9 3
|
||||
10 0
|
||||
11 3
|
||||
12 3
|
||||
13 0
|
||||
14 1
|
||||
15 3
|
||||
16 0
|
||||
17 0
|
||||
18 3
|
||||
19 3
|
||||
20 3
|
||||
21 0
|
||||
22 3
|
||||
23 0
|
||||
24 3
|
||||
25 0
|
||||
26 0
|
||||
27 3
|
||||
28 3
|
||||
29 3
|
||||
30 0
|
||||
31 2
|
||||
32 2
|
||||
33 1
|
||||
34 0
|
||||
35 1
|
||||
36 3
|
||||
37 0
|
||||
38 1
|
||||
39 1
|
||||
40 1
|
||||
41 1
|
||||
42 3
|
||||
43 0
|
||||
44 2
|
||||
45 0
|
||||
46 3
|
||||
47 1
|
||||
48 3
|
||||
49 0
|
||||
50 3
|
||||
51 2
|
||||
52 3
|
||||
53 0
|
||||
54 3
|
||||
55 0
|
||||
56 1
|
||||
57 0
|
||||
58 3
|
||||
59 3
|
||||
60 2
|
||||
61 0
|
||||
62 3
|
||||
63 0
|
||||
File diff suppressed because it is too large
Load Diff
File diff suppressed because it is too large
Load Diff
File diff suppressed because it is too large
Load Diff
File diff suppressed because it is too large
Load Diff
|
|
@ -0,0 +1,45 @@
|
|||
CC = g++
|
||||
OPT = -O3
|
||||
#OPT = -g
|
||||
WARN = -Wall
|
||||
CFLAGS = $(OPT) $(WARN) $(INC) $(LIB)
|
||||
|
||||
# List all your .cc files here (source files, excluding header files)
|
||||
SIM_SRC = main.cc world.cc
|
||||
|
||||
# List corresponding compiled object files here (.o files)
|
||||
SIM_OBJ = main.o world.o
|
||||
|
||||
#################################
|
||||
|
||||
# default rule
|
||||
|
||||
all: sim
|
||||
@echo "my work is done here..."
|
||||
|
||||
|
||||
# rule for making sim
|
||||
|
||||
sim: $(SIM_OBJ)
|
||||
$(CC) -o sim $(CFLAGS) $(SIM_OBJ) -lm
|
||||
@echo "-----------DONE WITH SIM-----------"
|
||||
|
||||
|
||||
# generic rule for converting any .cc file to any .o file
|
||||
|
||||
.cc.o:
|
||||
$(CC) $(CFLAGS) -c $*.cc
|
||||
|
||||
|
||||
# type "make clean" to remove all .o files plus the sim binary
|
||||
|
||||
clean:
|
||||
rm -f *.o sim
|
||||
|
||||
|
||||
# type "make clobber" to remove all .o files (leaves sim binary)
|
||||
|
||||
clobber:
|
||||
rm -f *.o
|
||||
|
||||
|
||||
|
|
@ -0,0 +1,6 @@
|
|||
|
||||
#include "world.h"
|
||||
|
||||
int main(int argc, char *argv[]) {
|
||||
hello_world(argc, argv);
|
||||
}
|
||||
|
|
@ -0,0 +1,10 @@
|
|||
#include <stdio.h>
|
||||
|
||||
void hello_world(int argc, char *argv[]) {
|
||||
printf("\n\nHello World!\n\n");
|
||||
|
||||
for (unsigned int i = 0; i < (unsigned int)argc; i++)
|
||||
printf("argument #%d = %s\n", i, argv[i]);
|
||||
|
||||
printf("\n\n");
|
||||
}
|
||||
|
|
@ -0,0 +1 @@
|
|||
void hello_world(int argc, char *argv[]);
|
||||
|
|
@ -0,0 +1,15 @@
|
|||
1. Download all the source files (.cc, .h) plus the Makefile to your own directory. (To download, click on the link with your right mouse button and select "Save Link As...".)
|
||||
2. Optional: "add gcc346" (to get most recent version of gcc/g++ compiler)
|
||||
3. "make" (this will create the binary, sim)
|
||||
4. Try running "sim" with any number of arguments. It will simply print "Hello World!" and then echo all the arguments back to you. For your project modify the Makefile use the relevant source files and try this relevant example:
|
||||
./sim gshare 9 3 0 0 gcc_trace.txt
|
||||
5. "make clean" (this will remove all .o files and the binary sim)
|
||||
6. "make" (build again)
|
||||
7. "make clobber" (this will remove only .o files, leaving the binary sim)
|
||||
------------------------------------------------------------------------
|
||||
You only need the Makefile from this directory. (The other bogus .cc/.h files are merely there as an example.)
|
||||
What you need to modify in the Makefile for your own needs:
|
||||
1. In the Makefile, replace all the .cc filenames with your .cc filenames, on the line labeled SIM_SRC. You can use as few or as many .cc files as you want.
|
||||
2. Likewise, update the names of .o files in the Makefile, on the line labeled SIM_OBJ. There must be a corresponding .o file for every .cc file.
|
||||
------------------------------------------------------------------------
|
||||
If you are using a different language/compiler, replace CC with your preferred compiler. You may also need to modify the default CFLAGS, depending on what other arguments your compiler requires. Also, if you use a different language, then you may need to change the .cc extensions to something else.
|
||||
File diff suppressed because it is too large
Load Diff
Binary file not shown.
Binary file not shown.
Binary file not shown.
Binary file not shown.
|
|
@ -0,0 +1,13 @@
|
|||
Proj1-1文件夹下包含了“实验一：Cache存储体系设计”第一部分（Generic Cache）所需的全部材料：
|
||||
|
||||
src：包含源码初始框架和Makefile文件
|
||||
|
||||
trace：包含实验所需的所有trace文件，即读/写访存地址流
|
||||
|
||||
validation：包含了所有仿真结果验证文件
|
||||
|
||||
debug：包含了所有仿真器调试文件
|
||||
|
||||
Proj1-1_Specification：实验指导书
|
||||
|
||||
checklist.pdf:自查文件
|
||||
Binary file not shown.
|
|
@ -0,0 +1,619 @@
|
|||
# 1 : Write 400341a0
|
||||
L1 Write: 400341a0(tag 1000d, index 26)
|
||||
Current set 26: -
|
||||
L1 MISS
|
||||
L1 UPDATE LRU
|
||||
L1 SET DIRTY
|
||||
Changed set 26: 1000d D
|
||||
# 2 : Read dfcfa8
|
||||
L1 Read: dfcfa8(tag 37f, index 250)
|
||||
Current set 250: -
|
||||
L1 MISS
|
||||
L1 UPDATE LRU
|
||||
Changed set 250: 37f
|
||||
# 3 : Write 7b034dd4
|
||||
L1 Write: 7b034dd4(tag 1ec0d, index 221)
|
||||
Current set 221: -
|
||||
L1 MISS
|
||||
L1 UPDATE LRU
|
||||
L1 SET DIRTY
|
||||
Changed set 221: 1ec0d D
|
||||
# 4 : Read df7c48
|
||||
L1 Read: df7c48(tag 37d, index 964)
|
||||
Current set 964: -
|
||||
L1 MISS
|
||||
L1 UPDATE LRU
|
||||
Changed set 964: 37d
|
||||
# 5 : Read 7b034dd4
|
||||
L1 Read: 7b034dd4(tag 1ec0d, index 221)
|
||||
Current set 221: 1ec0d D
|
||||
L1 HIT
|
||||
L1 UPDATE LRU
|
||||
Changed set 221: 1ec0d D
|
||||
# 6 : Read 423aebbc
|
||||
L1 Read: 423aebbc(tag 108eb, index 699)
|
||||
Current set 699: -
|
||||
L1 MISS
|
||||
L1 UPDATE LRU
|
||||
Changed set 699: 108eb
|
||||
# 7 : Read 423aebb8
|
||||
L1 Read: 423aebb8(tag 108eb, index 699)
|
||||
Current set 699: 108eb
|
||||
L1 HIT
|
||||
L1 UPDATE LRU
|
||||
Changed set 699: 108eb
|
||||
# 8 : Read 423aebbc
|
||||
L1 Read: 423aebbc(tag 108eb, index 699)
|
||||
Current set 699: 108eb
|
||||
L1 HIT
|
||||
L1 UPDATE LRU
|
||||
Changed set 699: 108eb
|
||||
# 9 : Read 40002634
|
||||
L1 Read: 40002634(tag 10000, index 611)
|
||||
Current set 611: -
|
||||
L1 MISS
|
||||
L1 UPDATE LRU
|
||||
Changed set 611: 10000
|
||||
# 10 : Write 40139dd0
|
||||
L1 Write: 40139dd0(tag 1004e, index 477)
|
||||
Current set 477: -
|
||||
L1 MISS
|
||||
L1 UPDATE LRU
|
||||
L1 SET DIRTY
|
||||
Changed set 477: 1004e D
|
||||
# 11 : Read 423aeb9c
|
||||
L1 Read: 423aeb9c(tag 108eb, index 697)
|
||||
Current set 697: -
|
||||
L1 MISS
|
||||
L1 UPDATE LRU
|
||||
Changed set 697: 108eb
|
||||
# 12 : Write 40139dd4
|
||||
L1 Write: 40139dd4(tag 1004e, index 477)
|
||||
Current set 477: 1004e D
|
||||
L1 HIT
|
||||
L1 UPDATE LRU
|
||||
L1 SET DIRTY
|
||||
Changed set 477: 1004e D
|
||||
# 13 : Write 40138938
|
||||
L1 Write: 40138938(tag 1004e, index 147)
|
||||
Current set 147: -
|
||||
L1 MISS
|
||||
L1 UPDATE LRU
|
||||
L1 SET DIRTY
|
||||
Changed set 147: 1004e D
|
||||
# 14 : Read 423aeba0
|
||||
L1 Read: 423aeba0(tag 108eb, index 698)
|
||||
Current set 698: -
|
||||
L1 MISS
|
||||
L1 UPDATE LRU
|
||||
Changed set 698: 108eb
|
||||
# 15 : Write 4013893c
|
||||
L1 Write: 4013893c(tag 1004e, index 147)
|
||||
Current set 147: 1004e D
|
||||
L1 HIT
|
||||
L1 UPDATE LRU
|
||||
L1 SET DIRTY
|
||||
Changed set 147: 1004e D
|
||||
# 16 : Read 7b034dcc
|
||||
L1 Read: 7b034dcc(tag 1ec0d, index 220)
|
||||
Current set 220: -
|
||||
L1 MISS
|
||||
L1 UPDATE LRU
|
||||
Changed set 220: 1ec0d
|
||||
# 17 : Read df8a70
|
||||
L1 Read: df8a70(tag 37e, index 167)
|
||||
Current set 167: -
|
||||
L1 MISS
|
||||
L1 UPDATE LRU
|
||||
Changed set 167: 37e
|
||||
# 18 : Write 7b034c50
|
||||
L1 Write: 7b034c50(tag 1ec0d, index 197)
|
||||
Current set 197: -
|
||||
L1 MISS
|
||||
L1 UPDATE LRU
|
||||
L1 SET DIRTY
|
||||
Changed set 197: 1ec0d D
|
||||
# 19 : Write 7b034c68
|
||||
L1 Write: 7b034c68(tag 1ec0d, index 198)
|
||||
Current set 198: -
|
||||
L1 MISS
|
||||
L1 UPDATE LRU
|
||||
L1 SET DIRTY
|
||||
Changed set 198: 1ec0d D
|
||||
# 20 : Read df9f10
|
||||
L1 Read: df9f10(tag 37e, index 497)
|
||||
Current set 497: -
|
||||
L1 MISS
|
||||
L1 UPDATE LRU
|
||||
Changed set 497: 37e
|
||||
# 21 : Write 7b034da8
|
||||
L1 Write: 7b034da8(tag 1ec0d, index 218)
|
||||
Current set 218: -
|
||||
L1 MISS
|
||||
L1 UPDATE LRU
|
||||
L1 SET DIRTY
|
||||
Changed set 218: 1ec0d D
|
||||
# 22 : Read 7b034dcc
|
||||
L1 Read: 7b034dcc(tag 1ec0d, index 220)
|
||||
Current set 220: 1ec0d
|
||||
L1 HIT
|
||||
L1 UPDATE LRU
|
||||
Changed set 220: 1ec0d
|
||||
# 23 : Read df8a74
|
||||
L1 Read: df8a74(tag 37e, index 167)
|
||||
Current set 167: 37e
|
||||
L1 HIT
|
||||
L1 UPDATE LRU
|
||||
Changed set 167: 37e
|
||||
# 24 : Write 7b034c54
|
||||
L1 Write: 7b034c54(tag 1ec0d, index 197)
|
||||
Current set 197: 1ec0d D
|
||||
L1 HIT
|
||||
L1 UPDATE LRU
|
||||
L1 SET DIRTY
|
||||
Changed set 197: 1ec0d D
|
||||
# 25 : Write 7b034c6c
|
||||
L1 Write: 7b034c6c(tag 1ec0d, index 198)
|
||||
Current set 198: 1ec0d D
|
||||
L1 HIT
|
||||
L1 UPDATE LRU
|
||||
L1 SET DIRTY
|
||||
Changed set 198: 1ec0d D
|
||||
# 26 : Read df9f14
|
||||
L1 Read: df9f14(tag 37e, index 497)
|
||||
Current set 497: 37e
|
||||
L1 HIT
|
||||
L1 UPDATE LRU
|
||||
Changed set 497: 37e
|
||||
# 27 : Write 7b034dac
|
||||
L1 Write: 7b034dac(tag 1ec0d, index 218)
|
||||
Current set 218: 1ec0d D
|
||||
L1 HIT
|
||||
L1 UPDATE LRU
|
||||
L1 SET DIRTY
|
||||
Changed set 218: 1ec0d D
|
||||
# 28 : Read 40138938
|
||||
L1 Read: 40138938(tag 1004e, index 147)
|
||||
Current set 147: 1004e D
|
||||
L1 HIT
|
||||
L1 UPDATE LRU
|
||||
Changed set 147: 1004e D
|
||||
# 29 : Write 7b034d90
|
||||
L1 Write: 7b034d90(tag 1ec0d, index 217)
|
||||
Current set 217: -
|
||||
L1 MISS
|
||||
L1 UPDATE LRU
|
||||
L1 SET DIRTY
|
||||
Changed set 217: 1ec0d D
|
||||
# 30 : Read 7b034c68
|
||||
L1 Read: 7b034c68(tag 1ec0d, index 198)
|
||||
Current set 198: 1ec0d D
|
||||
L1 HIT
|
||||
L1 UPDATE LRU
|
||||
Changed set 198: 1ec0d D
|
||||
# 31 : Read df84d4
|
||||
L1 Read: df84d4(tag 37e, index 77)
|
||||
Current set 77: -
|
||||
L1 MISS
|
||||
L1 UPDATE LRU
|
||||
Changed set 77: 37e
|
||||
# 32 : Read df84d5
|
||||
L1 Read: df84d5(tag 37e, index 77)
|
||||
Current set 77: 37e
|
||||
L1 HIT
|
||||
L1 UPDATE LRU
|
||||
Changed set 77: 37e
|
||||
# 33 : Read df84d6
|
||||
L1 Read: df84d6(tag 37e, index 77)
|
||||
Current set 77: 37e
|
||||
L1 HIT
|
||||
L1 UPDATE LRU
|
||||
Changed set 77: 37e
|
||||
# 34 : Read df84d7
|
||||
L1 Read: df84d7(tag 37e, index 77)
|
||||
Current set 77: 37e
|
||||
L1 HIT
|
||||
L1 UPDATE LRU
|
||||
Changed set 77: 37e
|
||||
# 35 : Read df84d8
|
||||
L1 Read: df84d8(tag 37e, index 77)
|
||||
Current set 77: 37e
|
||||
L1 HIT
|
||||
L1 UPDATE LRU
|
||||
Changed set 77: 37e
|
||||
# 36 : Read df84d9
|
||||
L1 Read: df84d9(tag 37e, index 77)
|
||||
Current set 77: 37e
|
||||
L1 HIT
|
||||
L1 UPDATE LRU
|
||||
Changed set 77: 37e
|
||||
# 37 : Read df84da
|
||||
L1 Read: df84da(tag 37e, index 77)
|
||||
Current set 77: 37e
|
||||
L1 HIT
|
||||
L1 UPDATE LRU
|
||||
Changed set 77: 37e
|
||||
# 38 : Read df84db
|
||||
L1 Read: df84db(tag 37e, index 77)
|
||||
Current set 77: 37e
|
||||
L1 HIT
|
||||
L1 UPDATE LRU
|
||||
Changed set 77: 37e
|
||||
# 39 : Read df84dc
|
||||
L1 Read: df84dc(tag 37e, index 77)
|
||||
Current set 77: 37e
|
||||
L1 HIT
|
||||
L1 UPDATE LRU
|
||||
Changed set 77: 37e
|
||||
# 40 : Read df84dd
|
||||
L1 Read: df84dd(tag 37e, index 77)
|
||||
Current set 77: 37e
|
||||
L1 HIT
|
||||
L1 UPDATE LRU
|
||||
Changed set 77: 37e
|
||||
# 41 : Read df84de
|
||||
L1 Read: df84de(tag 37e, index 77)
|
||||
Current set 77: 37e
|
||||
L1 HIT
|
||||
L1 UPDATE LRU
|
||||
Changed set 77: 37e
|
||||
# 42 : Read df84df
|
||||
L1 Read: df84df(tag 37e, index 77)
|
||||
Current set 77: 37e
|
||||
L1 HIT
|
||||
L1 UPDATE LRU
|
||||
Changed set 77: 37e
|
||||
# 43 : Read df84e0
|
||||
L1 Read: df84e0(tag 37e, index 78)
|
||||
Current set 78: -
|
||||
L1 MISS
|
||||
L1 UPDATE LRU
|
||||
Changed set 78: 37e
|
||||
# 44 : Read df84e1
|
||||
L1 Read: df84e1(tag 37e, index 78)
|
||||
Current set 78: 37e
|
||||
L1 HIT
|
||||
L1 UPDATE LRU
|
||||
Changed set 78: 37e
|
||||
# 45 : Read df84e2
|
||||
L1 Read: df84e2(tag 37e, index 78)
|
||||
Current set 78: 37e
|
||||
L1 HIT
|
||||
L1 UPDATE LRU
|
||||
Changed set 78: 37e
|
||||
# 46 : Read df84e3
|
||||
L1 Read: df84e3(tag 37e, index 78)
|
||||
Current set 78: 37e
|
||||
L1 HIT
|
||||
L1 UPDATE LRU
|
||||
Changed set 78: 37e
|
||||
# 47 : Read 4013893c
|
||||
L1 Read: 4013893c(tag 1004e, index 147)
|
||||
Current set 147: 1004e D
|
||||
L1 HIT
|
||||
L1 UPDATE LRU
|
||||
Changed set 147: 1004e D
|
||||
# 48 : Write 7b034d94
|
||||
L1 Write: 7b034d94(tag 1ec0d, index 217)
|
||||
Current set 217: 1ec0d D
|
||||
L1 HIT
|
||||
L1 UPDATE LRU
|
||||
L1 SET DIRTY
|
||||
Changed set 217: 1ec0d D
|
||||
# 49 : Read 7b034c6c
|
||||
L1 Read: 7b034c6c(tag 1ec0d, index 198)
|
||||
Current set 198: 1ec0d D
|
||||
L1 HIT
|
||||
L1 UPDATE LRU
|
||||
Changed set 198: 1ec0d D
|
||||
# 50 : Read df84e4
|
||||
L1 Read: df84e4(tag 37e, index 78)
|
||||
Current set 78: 37e
|
||||
L1 HIT
|
||||
L1 UPDATE LRU
|
||||
Changed set 78: 37e
|
||||
# 51 : Read df84e5
|
||||
L1 Read: df84e5(tag 37e, index 78)
|
||||
Current set 78: 37e
|
||||
L1 HIT
|
||||
L1 UPDATE LRU
|
||||
Changed set 78: 37e
|
||||
# 52 : Read df84e6
|
||||
L1 Read: df84e6(tag 37e, index 78)
|
||||
Current set 78: 37e
|
||||
L1 HIT
|
||||
L1 UPDATE LRU
|
||||
Changed set 78: 37e
|
||||
# 53 : Read df84e7
|
||||
L1 Read: df84e7(tag 37e, index 78)
|
||||
Current set 78: 37e
|
||||
L1 HIT
|
||||
L1 UPDATE LRU
|
||||
Changed set 78: 37e
|
||||
# 54 : Read df84e8
|
||||
L1 Read: df84e8(tag 37e, index 78)
|
||||
Current set 78: 37e
|
||||
L1 HIT
|
||||
L1 UPDATE LRU
|
||||
Changed set 78: 37e
|
||||
# 55 : Read df84e9
|
||||
L1 Read: df84e9(tag 37e, index 78)
|
||||
Current set 78: 37e
|
||||
L1 HIT
|
||||
L1 UPDATE LRU
|
||||
Changed set 78: 37e
|
||||
# 56 : Read df84ea
|
||||
L1 Read: df84ea(tag 37e, index 78)
|
||||
Current set 78: 37e
|
||||
L1 HIT
|
||||
L1 UPDATE LRU
|
||||
Changed set 78: 37e
|
||||
# 57 : Read df84eb
|
||||
L1 Read: df84eb(tag 37e, index 78)
|
||||
Current set 78: 37e
|
||||
L1 HIT
|
||||
L1 UPDATE LRU
|
||||
Changed set 78: 37e
|
||||
# 58 : Read df84ec
|
||||
L1 Read: df84ec(tag 37e, index 78)
|
||||
Current set 78: 37e
|
||||
L1 HIT
|
||||
L1 UPDATE LRU
|
||||
Changed set 78: 37e
|
||||
# 59 : Read df84ed
|
||||
L1 Read: df84ed(tag 37e, index 78)
|
||||
Current set 78: 37e
|
||||
L1 HIT
|
||||
L1 UPDATE LRU
|
||||
Changed set 78: 37e
|
||||
# 60 : Read df84ee
|
||||
L1 Read: df84ee(tag 37e, index 78)
|
||||
Current set 78: 37e
|
||||
L1 HIT
|
||||
L1 UPDATE LRU
|
||||
Changed set 78: 37e
|
||||
# 61 : Read df84ef
|
||||
L1 Read: df84ef(tag 37e, index 78)
|
||||
Current set 78: 37e
|
||||
L1 HIT
|
||||
L1 UPDATE LRU
|
||||
Changed set 78: 37e
|
||||
# 62 : Read df84f0
|
||||
L1 Read: df84f0(tag 37e, index 79)
|
||||
Current set 79: -
|
||||
L1 MISS
|
||||
L1 UPDATE LRU
|
||||
Changed set 79: 37e
|
||||
# 63 : Read df84f1
|
||||
L1 Read: df84f1(tag 37e, index 79)
|
||||
Current set 79: 37e
|
||||
L1 HIT
|
||||
L1 UPDATE LRU
|
||||
Changed set 79: 37e
|
||||
# 64 : Read df84f2
|
||||
L1 Read: df84f2(tag 37e, index 79)
|
||||
Current set 79: 37e
|
||||
L1 HIT
|
||||
L1 UPDATE LRU
|
||||
Changed set 79: 37e
|
||||
# 65 : Read df84f3
|
||||
L1 Read: df84f3(tag 37e, index 79)
|
||||
Current set 79: 37e
|
||||
L1 HIT
|
||||
L1 UPDATE LRU
|
||||
Changed set 79: 37e
|
||||
# 66 : Read df84f4
|
||||
L1 Read: df84f4(tag 37e, index 79)
|
||||
Current set 79: 37e
|
||||
L1 HIT
|
||||
L1 UPDATE LRU
|
||||
Changed set 79: 37e
|
||||
# 67 : Read df84f5
|
||||
L1 Read: df84f5(tag 37e, index 79)
|
||||
Current set 79: 37e
|
||||
L1 HIT
|
||||
L1 UPDATE LRU
|
||||
Changed set 79: 37e
|
||||
# 68 : Read 40138938
|
||||
L1 Read: 40138938(tag 1004e, index 147)
|
||||
Current set 147: 1004e D
|
||||
L1 HIT
|
||||
L1 UPDATE LRU
|
||||
Changed set 147: 1004e D
|
||||
# 69 : Read 423aeb90
|
||||
L1 Read: 423aeb90(tag 108eb, index 697)
|
||||
Current set 697: 108eb
|
||||
L1 HIT
|
||||
L1 UPDATE LRU
|
||||
Changed set 697: 108eb
|
||||
# 70 : Write 7b034d58
|
||||
L1 Write: 7b034d58(tag 1ec0d, index 213)
|
||||
Current set 213: -
|
||||
L1 MISS
|
||||
L1 UPDATE LRU
|
||||
L1 SET DIRTY
|
||||
Changed set 213: 1ec0d D
|
||||
# 71 : Write 7b034c80
|
||||
L1 Write: 7b034c80(tag 1ec0d, index 200)
|
||||
Current set 200: -
|
||||
L1 MISS
|
||||
L1 UPDATE LRU
|
||||
L1 SET DIRTY
|
||||
Changed set 200: 1ec0d D
|
||||
# 72 : Read 7b034c68
|
||||
L1 Read: 7b034c68(tag 1ec0d, index 198)
|
||||
Current set 198: 1ec0d D
|
||||
L1 HIT
|
||||
L1 UPDATE LRU
|
||||
Changed set 198: 1ec0d D
|
||||
# 73 : Read df84d4
|
||||
L1 Read: df84d4(tag 37e, index 77)
|
||||
Current set 77: 37e
|
||||
L1 HIT
|
||||
L1 UPDATE LRU
|
||||
Changed set 77: 37e
|
||||
# 74 : Read 40138938
|
||||
L1 Read: 40138938(tag 1004e, index 147)
|
||||
Current set 147: 1004e D
|
||||
L1 HIT
|
||||
L1 UPDATE LRU
|
||||
Changed set 147: 1004e D
|
||||
# 75 : Read 40139dd0
|
||||
L1 Read: 40139dd0(tag 1004e, index 477)
|
||||
Current set 477: 1004e D
|
||||
L1 HIT
|
||||
L1 UPDATE LRU
|
||||
Changed set 477: 1004e D
|
||||
# 76 : Read 423aeb92
|
||||
L1 Read: 423aeb92(tag 108eb, index 697)
|
||||
Current set 697: 108eb
|
||||
L1 HIT
|
||||
L1 UPDATE LRU
|
||||
Changed set 697: 108eb
|
||||
# 77 : Read 423aeb94
|
||||
L1 Read: 423aeb94(tag 108eb, index 697)
|
||||
Current set 697: 108eb
|
||||
L1 HIT
|
||||
L1 UPDATE LRU
|
||||
Changed set 697: 108eb
|
||||
# 78 : Read 423aeb88
|
||||
L1 Read: 423aeb88(tag 108eb, index 696)
|
||||
Current set 696: -
|
||||
L1 MISS
|
||||
L1 UPDATE LRU
|
||||
Changed set 696: 108eb
|
||||
# 79 : Read 423aeb88
|
||||
L1 Read: 423aeb88(tag 108eb, index 696)
|
||||
Current set 696: 108eb
|
||||
L1 HIT
|
||||
L1 UPDATE LRU
|
||||
Changed set 696: 108eb
|
||||
# 80 : Read 423aeb88
|
||||
L1 Read: 423aeb88(tag 108eb, index 696)
|
||||
Current set 696: 108eb
|
||||
L1 HIT
|
||||
L1 UPDATE LRU
|
||||
Changed set 696: 108eb
|
||||
# 81 : Read 423aeb88
|
||||
L1 Read: 423aeb88(tag 108eb, index 696)
|
||||
Current set 696: 108eb
|
||||
L1 HIT
|
||||
L1 UPDATE LRU
|
||||
Changed set 696: 108eb
|
||||
# 82 : Read 423aeb8c
|
||||
L1 Read: 423aeb8c(tag 108eb, index 696)
|
||||
Current set 696: 108eb
|
||||
L1 HIT
|
||||
L1 UPDATE LRU
|
||||
Changed set 696: 108eb
|
||||
# 83 : Read 42351e38
|
||||
L1 Read: 42351e38(tag 108d4, index 483)
|
||||
Current set 483: -
|
||||
L1 MISS
|
||||
L1 UPDATE LRU
|
||||
Changed set 483: 108d4
|
||||
# 84 : Read 42351e3c
|
||||
L1 Read: 42351e3c(tag 108d4, index 483)
|
||||
Current set 483: 108d4
|
||||
L1 HIT
|
||||
L1 UPDATE LRU
|
||||
Changed set 483: 108d4
|
||||
# 85 : Read 423aeb88
|
||||
L1 Read: 423aeb88(tag 108eb, index 696)
|
||||
Current set 696: 108eb
|
||||
L1 HIT
|
||||
L1 UPDATE LRU
|
||||
Changed set 696: 108eb
|
||||
# 86 : Write 40022e80
|
||||
L1 Write: 40022e80(tag 10008, index 744)
|
||||
Current set 744: -
|
||||
L1 MISS
|
||||
L1 UPDATE LRU
|
||||
L1 SET DIRTY
|
||||
Changed set 744: 10008 D
|
||||
# 87 : Read 423aeb88
|
||||
L1 Read: 423aeb88(tag 108eb, index 696)
|
||||
Current set 696: 108eb
|
||||
L1 HIT
|
||||
L1 UPDATE LRU
|
||||
Changed set 696: 108eb
|
||||
# 88 : Read 4214c9d4
|
||||
L1 Read: 4214c9d4(tag 10853, index 157)
|
||||
Current set 157: -
|
||||
L1 MISS
|
||||
L1 UPDATE LRU
|
||||
Changed set 157: 10853
|
||||
# 89 : Read 40002178
|
||||
L1 Read: 40002178(tag 10000, index 535)
|
||||
Current set 535: -
|
||||
L1 MISS
|
||||
L1 UPDATE LRU
|
||||
Changed set 535: 10000
|
||||
# 90 : Read 384130
|
||||
L1 Read: 384130(tag e1, index 19)
|
||||
Current set 19: -
|
||||
L1 MISS
|
||||
L1 UPDATE LRU
|
||||
Changed set 19: e1
|
||||
# 91 : Read 423aeb8c
|
||||
L1 Read: 423aeb8c(tag 108eb, index 696)
|
||||
Current set 696: 108eb
|
||||
L1 HIT
|
||||
L1 UPDATE LRU
|
||||
Changed set 696: 108eb
|
||||
# 92 : Read 42351e38
|
||||
L1 Read: 42351e38(tag 108d4, index 483)
|
||||
Current set 483: 108d4
|
||||
L1 HIT
|
||||
L1 UPDATE LRU
|
||||
Changed set 483: 108d4
|
||||
# 93 : Read 42351e3c
|
||||
L1 Read: 42351e3c(tag 108d4, index 483)
|
||||
Current set 483: 108d4
|
||||
L1 HIT
|
||||
L1 UPDATE LRU
|
||||
Changed set 483: 108d4
|
||||
# 94 : Read 401367d0
|
||||
L1 Read: 401367d0(tag 1004d, index 637)
|
||||
Current set 637: -
|
||||
L1 MISS
|
||||
L1 UPDATE LRU
|
||||
Changed set 637: 1004d
|
||||
# 95 : Read 7b0345e4
|
||||
L1 Read: 7b0345e4(tag 1ec0d, index 94)
|
||||
Current set 94: -
|
||||
L1 MISS
|
||||
L1 UPDATE LRU
|
||||
Changed set 94: 1ec0d
|
||||
# 96 : Write 423aeb8c
|
||||
L1 Write: 423aeb8c(tag 108eb, index 696)
|
||||
Current set 696: 108eb
|
||||
L1 HIT
|
||||
L1 UPDATE LRU
|
||||
L1 SET DIRTY
|
||||
Changed set 696: 108eb D
|
||||
# 97 : Write 423aeb94
|
||||
L1 Write: 423aeb94(tag 108eb, index 697)
|
||||
Current set 697: 108eb
|
||||
L1 HIT
|
||||
L1 UPDATE LRU
|
||||
L1 SET DIRTY
|
||||
Changed set 697: 108eb D
|
||||
# 98 : Read 40022e80
|
||||
L1 Read: 40022e80(tag 10008, index 744)
|
||||
Current set 744: 10008 D
|
||||
L1 HIT
|
||||
L1 UPDATE LRU
|
||||
Changed set 744: 10008 D
|
||||
# 99 : Read 40139dd0
|
||||
L1 Read: 40139dd0(tag 1004e, index 477)
|
||||
Current set 477: 1004e D
|
||||
L1 HIT
|
||||
L1 UPDATE LRU
|
||||
Changed set 477: 1004e D
|
||||
# 100 : Read 423aeb9c
|
||||
L1 Read: 423aeb9c(tag 108eb, index 697)
|
||||
Current set 697: 108eb D
|
||||
L1 HIT
|
||||
L1 UPDATE LRU
|
||||
Changed set 697: 108eb D
|
||||
|
|
@ -0,0 +1,555 @@
|
|||
# 1 : Read 40012998
|
||||
L1 Read: 40012998(tag 400129, index 1)
|
||||
Current set 1: - - - - - - - -
|
||||
L1 MISS
|
||||
L1 UPDATE LRU
|
||||
Changed set 1: 400129 - - - - - - -
|
||||
# 2 : Read 40012988
|
||||
L1 Read: 40012988(tag 400129, index 1)
|
||||
Current set 1: 400129 - - - - - - -
|
||||
L1 HIT
|
||||
L1 UPDATE LRU
|
||||
Changed set 1: 400129 - - - - - - -
|
||||
# 3 : Read 4008b390
|
||||
L1 Read: 4008b390(tag 4008b3, index 1)
|
||||
Current set 1: 400129 - - - - - - -
|
||||
L1 MISS
|
||||
L1 UPDATE LRU
|
||||
Changed set 1: 400129 4008b3 - - - - - -
|
||||
# 4 : Write 4002e84c
|
||||
L1 Write: 4002e84c(tag 4002e8, index 0)
|
||||
Current set 0: - - - - - - - -
|
||||
L1 MISS, WRITE THROUGH
|
||||
Changed set 0: - - - - - - - -
|
||||
# 5 : Write 4002e850
|
||||
L1 Write: 4002e850(tag 4002e8, index 0)
|
||||
Current set 0: - - - - - - - -
|
||||
L1 MISS, WRITE THROUGH
|
||||
Changed set 0: - - - - - - - -
|
||||
# 6 : Read 40012988
|
||||
L1 Read: 40012988(tag 400129, index 1)
|
||||
Current set 1: 400129 4008b3 - - - - - -
|
||||
L1 HIT
|
||||
L1 UPDATE LRU
|
||||
Changed set 1: 400129 4008b3 - - - - - -
|
||||
# 7 : Write 4003c200
|
||||
L1 Write: 4003c200(tag 4003c2, index 0)
|
||||
Current set 0: - - - - - - - -
|
||||
L1 MISS, WRITE THROUGH
|
||||
Changed set 0: - - - - - - - -
|
||||
# 8 : Read 40012988
|
||||
L1 Read: 40012988(tag 400129, index 1)
|
||||
Current set 1: 400129 4008b3 - - - - - -
|
||||
L1 HIT
|
||||
L1 UPDATE LRU
|
||||
Changed set 1: 400129 4008b3 - - - - - -
|
||||
# 9 : Write 40049600
|
||||
L1 Write: 40049600(tag 400496, index 0)
|
||||
Current set 0: - - - - - - - -
|
||||
L1 MISS, WRITE THROUGH
|
||||
Changed set 0: - - - - - - - -
|
||||
# 10 : Read 40012a00
|
||||
L1 Read: 40012a00(tag 40012a, index 0)
|
||||
Current set 0: - - - - - - - -
|
||||
L1 MISS
|
||||
L1 UPDATE LRU
|
||||
Changed set 0: 40012a - - - - - - -
|
||||
# 11 : Read 4001298c
|
||||
L1 Read: 4001298c(tag 400129, index 1)
|
||||
Current set 1: 400129 4008b3 - - - - - -
|
||||
L1 HIT
|
||||
L1 UPDATE LRU
|
||||
Changed set 1: 400129 4008b3 - - - - - -
|
||||
# 12 : Read 4008b390
|
||||
L1 Read: 4008b390(tag 4008b3, index 1)
|
||||
Current set 1: 400129 4008b3 - - - - - -
|
||||
L1 HIT
|
||||
L1 UPDATE LRU
|
||||
Changed set 1: 400129 4008b3 - - - - - -
|
||||
# 13 : Write 4002e84c
|
||||
L1 Write: 4002e84c(tag 4002e8, index 0)
|
||||
Current set 0: 40012a - - - - - - -
|
||||
L1 MISS, WRITE THROUGH
|
||||
Changed set 0: 40012a - - - - - - -
|
||||
# 14 : Write 4002e850
|
||||
L1 Write: 4002e850(tag 4002e8, index 0)
|
||||
Current set 0: 40012a - - - - - - -
|
||||
L1 MISS, WRITE THROUGH
|
||||
Changed set 0: 40012a - - - - - - -
|
||||
# 15 : Read 4001298c
|
||||
L1 Read: 4001298c(tag 400129, index 1)
|
||||
Current set 1: 400129 4008b3 - - - - - -
|
||||
L1 HIT
|
||||
L1 UPDATE LRU
|
||||
Changed set 1: 400129 4008b3 - - - - - -
|
||||
# 16 : Write 4003c204
|
||||
L1 Write: 4003c204(tag 4003c2, index 0)
|
||||
Current set 0: 40012a - - - - - - -
|
||||
L1 MISS, WRITE THROUGH
|
||||
Changed set 0: 40012a - - - - - - -
|
||||
# 17 : Read 4001298c
|
||||
L1 Read: 4001298c(tag 400129, index 1)
|
||||
Current set 1: 400129 4008b3 - - - - - -
|
||||
L1 HIT
|
||||
L1 UPDATE LRU
|
||||
Changed set 1: 400129 4008b3 - - - - - -
|
||||
# 18 : Write 40049604
|
||||
L1 Write: 40049604(tag 400496, index 0)
|
||||
Current set 0: 40012a - - - - - - -
|
||||
L1 MISS, WRITE THROUGH
|
||||
Changed set 0: 40012a - - - - - - -
|
||||
# 19 : Read 40012a04
|
||||
L1 Read: 40012a04(tag 40012a, index 0)
|
||||
Current set 0: 40012a - - - - - - -
|
||||
L1 HIT
|
||||
L1 UPDATE LRU
|
||||
Changed set 0: 40012a - - - - - - -
|
||||
# 20 : Read 40012990
|
||||
L1 Read: 40012990(tag 400129, index 1)
|
||||
Current set 1: 400129 4008b3 - - - - - -
|
||||
L1 HIT
|
||||
L1 UPDATE LRU
|
||||
Changed set 1: 400129 4008b3 - - - - - -
|
||||
# 21 : Read 4008b390
|
||||
L1 Read: 4008b390(tag 4008b3, index 1)
|
||||
Current set 1: 400129 4008b3 - - - - - -
|
||||
L1 HIT
|
||||
L1 UPDATE LRU
|
||||
Changed set 1: 400129 4008b3 - - - - - -
|
||||
# 22 : Write 4002e84c
|
||||
L1 Write: 4002e84c(tag 4002e8, index 0)
|
||||
Current set 0: 40012a - - - - - - -
|
||||
L1 MISS, WRITE THROUGH
|
||||
Changed set 0: 40012a - - - - - - -
|
||||
# 23 : Write 4002e850
|
||||
L1 Write: 4002e850(tag 4002e8, index 0)
|
||||
Current set 0: 40012a - - - - - - -
|
||||
L1 MISS, WRITE THROUGH
|
||||
Changed set 0: 40012a - - - - - - -
|
||||
# 24 : Read 40012990
|
||||
L1 Read: 40012990(tag 400129, index 1)
|
||||
Current set 1: 400129 4008b3 - - - - - -
|
||||
L1 HIT
|
||||
L1 UPDATE LRU
|
||||
Changed set 1: 400129 4008b3 - - - - - -
|
||||
# 25 : Write 4003c208
|
||||
L1 Write: 4003c208(tag 4003c2, index 0)
|
||||
Current set 0: 40012a - - - - - - -
|
||||
L1 MISS, WRITE THROUGH
|
||||
Changed set 0: 40012a - - - - - - -
|
||||
# 26 : Read 40012990
|
||||
L1 Read: 40012990(tag 400129, index 1)
|
||||
Current set 1: 400129 4008b3 - - - - - -
|
||||
L1 HIT
|
||||
L1 UPDATE LRU
|
||||
Changed set 1: 400129 4008b3 - - - - - -
|
||||
# 27 : Write 40049608
|
||||
L1 Write: 40049608(tag 400496, index 0)
|
||||
Current set 0: 40012a - - - - - - -
|
||||
L1 MISS, WRITE THROUGH
|
||||
Changed set 0: 40012a - - - - - - -
|
||||
# 28 : Read 40012a08
|
||||
L1 Read: 40012a08(tag 40012a, index 0)
|
||||
Current set 0: 40012a - - - - - - -
|
||||
L1 HIT
|
||||
L1 UPDATE LRU
|
||||
Changed set 0: 40012a - - - - - - -
|
||||
# 29 : Write 4002e864
|
||||
L1 Write: 4002e864(tag 4002e8, index 0)
|
||||
Current set 0: 40012a - - - - - - -
|
||||
L1 MISS, WRITE THROUGH
|
||||
Changed set 0: 40012a - - - - - - -
|
||||
# 30 : Read 40012994
|
||||
L1 Read: 40012994(tag 400129, index 1)
|
||||
Current set 1: 400129 4008b3 - - - - - -
|
||||
L1 HIT
|
||||
L1 UPDATE LRU
|
||||
Changed set 1: 400129 4008b3 - - - - - -
|
||||
# 31 : Read 4008b390
|
||||
L1 Read: 4008b390(tag 4008b3, index 1)
|
||||
Current set 1: 400129 4008b3 - - - - - -
|
||||
L1 HIT
|
||||
L1 UPDATE LRU
|
||||
Changed set 1: 400129 4008b3 - - - - - -
|
||||
# 32 : Write 4002e84c
|
||||
L1 Write: 4002e84c(tag 4002e8, index 0)
|
||||
Current set 0: 40012a - - - - - - -
|
||||
L1 MISS, WRITE THROUGH
|
||||
Changed set 0: 40012a - - - - - - -
|
||||
# 33 : Write 4002e850
|
||||
L1 Write: 4002e850(tag 4002e8, index 0)
|
||||
Current set 0: 40012a - - - - - - -
|
||||
L1 MISS, WRITE THROUGH
|
||||
Changed set 0: 40012a - - - - - - -
|
||||
# 34 : Read 40012994
|
||||
L1 Read: 40012994(tag 400129, index 1)
|
||||
Current set 1: 400129 4008b3 - - - - - -
|
||||
L1 HIT
|
||||
L1 UPDATE LRU
|
||||
Changed set 1: 400129 4008b3 - - - - - -
|
||||
# 35 : Write 4003c20c
|
||||
L1 Write: 4003c20c(tag 4003c2, index 0)
|
||||
Current set 0: 40012a - - - - - - -
|
||||
L1 MISS, WRITE THROUGH
|
||||
Changed set 0: 40012a - - - - - - -
|
||||
# 36 : Read 40012994
|
||||
L1 Read: 40012994(tag 400129, index 1)
|
||||
Current set 1: 400129 4008b3 - - - - - -
|
||||
L1 HIT
|
||||
L1 UPDATE LRU
|
||||
Changed set 1: 400129 4008b3 - - - - - -
|
||||
# 37 : Write 4004960c
|
||||
L1 Write: 4004960c(tag 400496, index 0)
|
||||
Current set 0: 40012a - - - - - - -
|
||||
L1 MISS, WRITE THROUGH
|
||||
Changed set 0: 40012a - - - - - - -
|
||||
# 38 : Read 40012a0c
|
||||
L1 Read: 40012a0c(tag 40012a, index 0)
|
||||
Current set 0: 40012a - - - - - - -
|
||||
L1 HIT
|
||||
L1 UPDATE LRU
|
||||
Changed set 0: 40012a - - - - - - -
|
||||
# 39 : Read 40012998
|
||||
L1 Read: 40012998(tag 400129, index 1)
|
||||
Current set 1: 400129 4008b3 - - - - - -
|
||||
L1 HIT
|
||||
L1 UPDATE LRU
|
||||
Changed set 1: 400129 4008b3 - - - - - -
|
||||
# 40 : Read 4008b390
|
||||
L1 Read: 4008b390(tag 4008b3, index 1)
|
||||
Current set 1: 400129 4008b3 - - - - - -
|
||||
L1 HIT
|
||||
L1 UPDATE LRU
|
||||
Changed set 1: 400129 4008b3 - - - - - -
|
||||
# 41 : Write 4002e84c
|
||||
L1 Write: 4002e84c(tag 4002e8, index 0)
|
||||
Current set 0: 40012a - - - - - - -
|
||||
L1 MISS, WRITE THROUGH
|
||||
Changed set 0: 40012a - - - - - - -
|
||||
# 42 : Write 4002e850
|
||||
L1 Write: 4002e850(tag 4002e8, index 0)
|
||||
Current set 0: 40012a - - - - - - -
|
||||
L1 MISS, WRITE THROUGH
|
||||
Changed set 0: 40012a - - - - - - -
|
||||
# 43 : Read 40012998
|
||||
L1 Read: 40012998(tag 400129, index 1)
|
||||
Current set 1: 400129 4008b3 - - - - - -
|
||||
L1 HIT
|
||||
L1 UPDATE LRU
|
||||
Changed set 1: 400129 4008b3 - - - - - -
|
||||
# 44 : Write 4003c210
|
||||
L1 Write: 4003c210(tag 4003c2, index 0)
|
||||
Current set 0: 40012a - - - - - - -
|
||||
L1 MISS, WRITE THROUGH
|
||||
Changed set 0: 40012a - - - - - - -
|
||||
# 45 : Read 40012998
|
||||
L1 Read: 40012998(tag 400129, index 1)
|
||||
Current set 1: 400129 4008b3 - - - - - -
|
||||
L1 HIT
|
||||
L1 UPDATE LRU
|
||||
Changed set 1: 400129 4008b3 - - - - - -
|
||||
# 46 : Write 40049610
|
||||
L1 Write: 40049610(tag 400496, index 0)
|
||||
Current set 0: 40012a - - - - - - -
|
||||
L1 MISS, WRITE THROUGH
|
||||
Changed set 0: 40012a - - - - - - -
|
||||
# 47 : Read 40012a10
|
||||
L1 Read: 40012a10(tag 40012a, index 0)
|
||||
Current set 0: 40012a - - - - - - -
|
||||
L1 HIT
|
||||
L1 UPDATE LRU
|
||||
Changed set 0: 40012a - - - - - - -
|
||||
# 48 : Read 4001299c
|
||||
L1 Read: 4001299c(tag 400129, index 1)
|
||||
Current set 1: 400129 4008b3 - - - - - -
|
||||
L1 HIT
|
||||
L1 UPDATE LRU
|
||||
Changed set 1: 400129 4008b3 - - - - - -
|
||||
# 49 : Read 4008b390
|
||||
L1 Read: 4008b390(tag 4008b3, index 1)
|
||||
Current set 1: 400129 4008b3 - - - - - -
|
||||
L1 HIT
|
||||
L1 UPDATE LRU
|
||||
Changed set 1: 400129 4008b3 - - - - - -
|
||||
# 50 : Write 4002e84c
|
||||
L1 Write: 4002e84c(tag 4002e8, index 0)
|
||||
Current set 0: 40012a - - - - - - -
|
||||
L1 MISS, WRITE THROUGH
|
||||
Changed set 0: 40012a - - - - - - -
|
||||
# 51 : Write 4002e850
|
||||
L1 Write: 4002e850(tag 4002e8, index 0)
|
||||
Current set 0: 40012a - - - - - - -
|
||||
L1 MISS, WRITE THROUGH
|
||||
Changed set 0: 40012a - - - - - - -
|
||||
# 52 : Read 4001299c
|
||||
L1 Read: 4001299c(tag 400129, index 1)
|
||||
Current set 1: 400129 4008b3 - - - - - -
|
||||
L1 HIT
|
||||
L1 UPDATE LRU
|
||||
Changed set 1: 400129 4008b3 - - - - - -
|
||||
# 53 : Write 4003c214
|
||||
L1 Write: 4003c214(tag 4003c2, index 0)
|
||||
Current set 0: 40012a - - - - - - -
|
||||
L1 MISS, WRITE THROUGH
|
||||
Changed set 0: 40012a - - - - - - -
|
||||
# 54 : Read 4001299c
|
||||
L1 Read: 4001299c(tag 400129, index 1)
|
||||
Current set 1: 400129 4008b3 - - - - - -
|
||||
L1 HIT
|
||||
L1 UPDATE LRU
|
||||
Changed set 1: 400129 4008b3 - - - - - -
|
||||
# 55 : Write 40049614
|
||||
L1 Write: 40049614(tag 400496, index 0)
|
||||
Current set 0: 40012a - - - - - - -
|
||||
L1 MISS, WRITE THROUGH
|
||||
Changed set 0: 40012a - - - - - - -
|
||||
# 56 : Read 40012a14
|
||||
L1 Read: 40012a14(tag 40012a, index 0)
|
||||
Current set 0: 40012a - - - - - - -
|
||||
L1 HIT
|
||||
L1 UPDATE LRU
|
||||
Changed set 0: 40012a - - - - - - -
|
||||
# 57 : Write 4002e868
|
||||
L1 Write: 4002e868(tag 4002e8, index 0)
|
||||
Current set 0: 40012a - - - - - - -
|
||||
L1 MISS, WRITE THROUGH
|
||||
Changed set 0: 40012a - - - - - - -
|
||||
# 58 : Read 400129a0
|
||||
L1 Read: 400129a0(tag 400129, index 1)
|
||||
Current set 1: 400129 4008b3 - - - - - -
|
||||
L1 HIT
|
||||
L1 UPDATE LRU
|
||||
Changed set 1: 400129 4008b3 - - - - - -
|
||||
# 59 : Read 4008b390
|
||||
L1 Read: 4008b390(tag 4008b3, index 1)
|
||||
Current set 1: 400129 4008b3 - - - - - -
|
||||
L1 HIT
|
||||
L1 UPDATE LRU
|
||||
Changed set 1: 400129 4008b3 - - - - - -
|
||||
# 60 : Write 4002e84c
|
||||
L1 Write: 4002e84c(tag 4002e8, index 0)
|
||||
Current set 0: 40012a - - - - - - -
|
||||
L1 MISS, WRITE THROUGH
|
||||
Changed set 0: 40012a - - - - - - -
|
||||
# 61 : Write 4002e850
|
||||
L1 Write: 4002e850(tag 4002e8, index 0)
|
||||
Current set 0: 40012a - - - - - - -
|
||||
L1 MISS, WRITE THROUGH
|
||||
Changed set 0: 40012a - - - - - - -
|
||||
# 62 : Read 400129a0
|
||||
L1 Read: 400129a0(tag 400129, index 1)
|
||||
Current set 1: 400129 4008b3 - - - - - -
|
||||
L1 HIT
|
||||
L1 UPDATE LRU
|
||||
Changed set 1: 400129 4008b3 - - - - - -
|
||||
# 63 : Write 4003c218
|
||||
L1 Write: 4003c218(tag 4003c2, index 0)
|
||||
Current set 0: 40012a - - - - - - -
|
||||
L1 MISS, WRITE THROUGH
|
||||
Changed set 0: 40012a - - - - - - -
|
||||
# 64 : Read 400129a0
|
||||
L1 Read: 400129a0(tag 400129, index 1)
|
||||
Current set 1: 400129 4008b3 - - - - - -
|
||||
L1 HIT
|
||||
L1 UPDATE LRU
|
||||
Changed set 1: 400129 4008b3 - - - - - -
|
||||
# 65 : Write 40049618
|
||||
L1 Write: 40049618(tag 400496, index 0)
|
||||
Current set 0: 40012a - - - - - - -
|
||||
L1 MISS, WRITE THROUGH
|
||||
Changed set 0: 40012a - - - - - - -
|
||||
# 66 : Read 40012a18
|
||||
L1 Read: 40012a18(tag 40012a, index 0)
|
||||
Current set 0: 40012a - - - - - - -
|
||||
L1 HIT
|
||||
L1 UPDATE LRU
|
||||
Changed set 0: 40012a - - - - - - -
|
||||
# 67 : Read 400129a4
|
||||
L1 Read: 400129a4(tag 400129, index 1)
|
||||
Current set 1: 400129 4008b3 - - - - - -
|
||||
L1 HIT
|
||||
L1 UPDATE LRU
|
||||
Changed set 1: 400129 4008b3 - - - - - -
|
||||
# 68 : Read 4008b390
|
||||
L1 Read: 4008b390(tag 4008b3, index 1)
|
||||
Current set 1: 400129 4008b3 - - - - - -
|
||||
L1 HIT
|
||||
L1 UPDATE LRU
|
||||
Changed set 1: 400129 4008b3 - - - - - -
|
||||
# 69 : Write 4002e84c
|
||||
L1 Write: 4002e84c(tag 4002e8, index 0)
|
||||
Current set 0: 40012a - - - - - - -
|
||||
L1 MISS, WRITE THROUGH
|
||||
Changed set 0: 40012a - - - - - - -
|
||||
# 70 : Write 4002e850
|
||||
L1 Write: 4002e850(tag 4002e8, index 0)
|
||||
Current set 0: 40012a - - - - - - -
|
||||
L1 MISS, WRITE THROUGH
|
||||
Changed set 0: 40012a - - - - - - -
|
||||
# 71 : Read 400129a4
|
||||
L1 Read: 400129a4(tag 400129, index 1)
|
||||
Current set 1: 400129 4008b3 - - - - - -
|
||||
L1 HIT
|
||||
L1 UPDATE LRU
|
||||
Changed set 1: 400129 4008b3 - - - - - -
|
||||
# 72 : Write 4003c21c
|
||||
L1 Write: 4003c21c(tag 4003c2, index 0)
|
||||
Current set 0: 40012a - - - - - - -
|
||||
L1 MISS, WRITE THROUGH
|
||||
Changed set 0: 40012a - - - - - - -
|
||||
# 73 : Read 400129a4
|
||||
L1 Read: 400129a4(tag 400129, index 1)
|
||||
Current set 1: 400129 4008b3 - - - - - -
|
||||
L1 HIT
|
||||
L1 UPDATE LRU
|
||||
Changed set 1: 400129 4008b3 - - - - - -
|
||||
# 74 : Write 4004961c
|
||||
L1 Write: 4004961c(tag 400496, index 0)
|
||||
Current set 0: 40012a - - - - - - -
|
||||
L1 MISS, WRITE THROUGH
|
||||
Changed set 0: 40012a - - - - - - -
|
||||
# 75 : Read 40012a1c
|
||||
L1 Read: 40012a1c(tag 40012a, index 0)
|
||||
Current set 0: 40012a - - - - - - -
|
||||
L1 HIT
|
||||
L1 UPDATE LRU
|
||||
Changed set 0: 40012a - - - - - - -
|
||||
# 76 : Read 400129a8
|
||||
L1 Read: 400129a8(tag 400129, index 1)
|
||||
Current set 1: 400129 4008b3 - - - - - -
|
||||
L1 HIT
|
||||
L1 UPDATE LRU
|
||||
Changed set 1: 400129 4008b3 - - - - - -
|
||||
# 77 : Read 4008b390
|
||||
L1 Read: 4008b390(tag 4008b3, index 1)
|
||||
Current set 1: 400129 4008b3 - - - - - -
|
||||
L1 HIT
|
||||
L1 UPDATE LRU
|
||||
Changed set 1: 400129 4008b3 - - - - - -
|
||||
# 78 : Write 4002e84c
|
||||
L1 Write: 4002e84c(tag 4002e8, index 0)
|
||||
Current set 0: 40012a - - - - - - -
|
||||
L1 MISS, WRITE THROUGH
|
||||
Changed set 0: 40012a - - - - - - -
|
||||
# 79 : Write 4002e850
|
||||
L1 Write: 4002e850(tag 4002e8, index 0)
|
||||
Current set 0: 40012a - - - - - - -
|
||||
L1 MISS, WRITE THROUGH
|
||||
Changed set 0: 40012a - - - - - - -
|
||||
# 80 : Read 400129a8
|
||||
L1 Read: 400129a8(tag 400129, index 1)
|
||||
Current set 1: 400129 4008b3 - - - - - -
|
||||
L1 HIT
|
||||
L1 UPDATE LRU
|
||||
Changed set 1: 400129 4008b3 - - - - - -
|
||||
# 81 : Write 4003c220
|
||||
L1 Write: 4003c220(tag 4003c2, index 0)
|
||||
Current set 0: 40012a - - - - - - -
|
||||
L1 MISS, WRITE THROUGH
|
||||
Changed set 0: 40012a - - - - - - -
|
||||
# 82 : Read 400129a8
|
||||
L1 Read: 400129a8(tag 400129, index 1)
|
||||
Current set 1: 400129 4008b3 - - - - - -
|
||||
L1 HIT
|
||||
L1 UPDATE LRU
|
||||
Changed set 1: 400129 4008b3 - - - - - -
|
||||
# 83 : Write 40049620
|
||||
L1 Write: 40049620(tag 400496, index 0)
|
||||
Current set 0: 40012a - - - - - - -
|
||||
L1 MISS, WRITE THROUGH
|
||||
Changed set 0: 40012a - - - - - - -
|
||||
# 84 : Read 40012a20
|
||||
L1 Read: 40012a20(tag 40012a, index 0)
|
||||
Current set 0: 40012a - - - - - - -
|
||||
L1 HIT
|
||||
L1 UPDATE LRU
|
||||
Changed set 0: 40012a - - - - - - -
|
||||
# 85 : Read 400129ac
|
||||
L1 Read: 400129ac(tag 400129, index 1)
|
||||
Current set 1: 400129 4008b3 - - - - - -
|
||||
L1 HIT
|
||||
L1 UPDATE LRU
|
||||
Changed set 1: 400129 4008b3 - - - - - -
|
||||
# 86 : Read 4008b390
|
||||
L1 Read: 4008b390(tag 4008b3, index 1)
|
||||
Current set 1: 400129 4008b3 - - - - - -
|
||||
L1 HIT
|
||||
L1 UPDATE LRU
|
||||
Changed set 1: 400129 4008b3 - - - - - -
|
||||
# 87 : Write 4002e84c
|
||||
L1 Write: 4002e84c(tag 4002e8, index 0)
|
||||
Current set 0: 40012a - - - - - - -
|
||||
L1 MISS, WRITE THROUGH
|
||||
Changed set 0: 40012a - - - - - - -
|
||||
# 88 : Write 4002e850
|
||||
L1 Write: 4002e850(tag 4002e8, index 0)
|
||||
Current set 0: 40012a - - - - - - -
|
||||
L1 MISS, WRITE THROUGH
|
||||
Changed set 0: 40012a - - - - - - -
|
||||
# 89 : Read 400129ac
|
||||
L1 Read: 400129ac(tag 400129, index 1)
|
||||
Current set 1: 400129 4008b3 - - - - - -
|
||||
L1 HIT
|
||||
L1 UPDATE LRU
|
||||
Changed set 1: 400129 4008b3 - - - - - -
|
||||
# 90 : Write 4003c224
|
||||
L1 Write: 4003c224(tag 4003c2, index 0)
|
||||
Current set 0: 40012a - - - - - - -
|
||||
L1 MISS, WRITE THROUGH
|
||||
Changed set 0: 40012a - - - - - - -
|
||||
# 91 : Read 400129ac
|
||||
L1 Read: 400129ac(tag 400129, index 1)
|
||||
Current set 1: 400129 4008b3 - - - - - -
|
||||
L1 HIT
|
||||
L1 UPDATE LRU
|
||||
Changed set 1: 400129 4008b3 - - - - - -
|
||||
# 92 : Write 40049624
|
||||
L1 Write: 40049624(tag 400496, index 0)
|
||||
Current set 0: 40012a - - - - - - -
|
||||
L1 MISS, WRITE THROUGH
|
||||
Changed set 0: 40012a - - - - - - -
|
||||
# 93 : Read 40012a24
|
||||
L1 Read: 40012a24(tag 40012a, index 0)
|
||||
Current set 0: 40012a - - - - - - -
|
||||
L1 HIT
|
||||
L1 UPDATE LRU
|
||||
Changed set 0: 40012a - - - - - - -
|
||||
# 94 : Read 400129b0
|
||||
L1 Read: 400129b0(tag 400129, index 1)
|
||||
Current set 1: 400129 4008b3 - - - - - -
|
||||
L1 HIT
|
||||
L1 UPDATE LRU
|
||||
Changed set 1: 400129 4008b3 - - - - - -
|
||||
# 95 : Read 4008b390
|
||||
L1 Read: 4008b390(tag 4008b3, index 1)
|
||||
Current set 1: 400129 4008b3 - - - - - -
|
||||
L1 HIT
|
||||
L1 UPDATE LRU
|
||||
Changed set 1: 400129 4008b3 - - - - - -
|
||||
# 96 : Write 4002e84c
|
||||
L1 Write: 4002e84c(tag 4002e8, index 0)
|
||||
Current set 0: 40012a - - - - - - -
|
||||
L1 MISS, WRITE THROUGH
|
||||
Changed set 0: 40012a - - - - - - -
|
||||
# 97 : Write 4002e850
|
||||
L1 Write: 4002e850(tag 4002e8, index 0)
|
||||
Current set 0: 40012a - - - - - - -
|
||||
L1 MISS, WRITE THROUGH
|
||||
Changed set 0: 40012a - - - - - - -
|
||||
# 98 : Read 400129b0
|
||||
L1 Read: 400129b0(tag 400129, index 1)
|
||||
Current set 1: 400129 4008b3 - - - - - -
|
||||
L1 HIT
|
||||
L1 UPDATE LRU
|
||||
Changed set 1: 400129 4008b3 - - - - - -
|
||||
# 99 : Write 4003c228
|
||||
L1 Write: 4003c228(tag 4003c2, index 0)
|
||||
Current set 0: 40012a - - - - - - -
|
||||
L1 MISS, WRITE THROUGH
|
||||
Changed set 0: 40012a - - - - - - -
|
||||
# 100 : Read 400129b0
|
||||
L1 Read: 400129b0(tag 400129, index 1)
|
||||
Current set 1: 400129 4008b3 - - - - - -
|
||||
L1 HIT
|
||||
L1 UPDATE LRU
|
||||
Changed set 1: 400129 4008b3 - - - - - -
|
||||
|
|
@ -0,0 +1,583 @@
|
|||
# 1 : Write 4001b388
|
||||
L1 Write: 4001b388(tag 10006c, index 28)
|
||||
Current set 28: - - - -
|
||||
L1 MISS, WRITE THROUGH
|
||||
Changed set 28: - - - -
|
||||
# 2 : Read 4001b378
|
||||
L1 Read: 4001b378(tag 10006c, index 27)
|
||||
Current set 27: - - - -
|
||||
L1 MISS
|
||||
L1 UPDATE LRU
|
||||
Changed set 27: 10006c - - -
|
||||
# 3 : Write 4001b3af
|
||||
L1 Write: 4001b3af(tag 10006c, index 29)
|
||||
Current set 29: - - - -
|
||||
L1 MISS, WRITE THROUGH
|
||||
Changed set 29: - - - -
|
||||
# 4 : Write 4001b391
|
||||
L1 Write: 4001b391(tag 10006c, index 28)
|
||||
Current set 28: - - - -
|
||||
L1 MISS, WRITE THROUGH
|
||||
Changed set 28: - - - -
|
||||
# 5 : Write 4001b390
|
||||
L1 Write: 4001b390(tag 10006c, index 28)
|
||||
Current set 28: - - - -
|
||||
L1 MISS, WRITE THROUGH
|
||||
Changed set 28: - - - -
|
||||
# 6 : Read 4000d4e4
|
||||
L1 Read: 4000d4e4(tag 100035, index 7)
|
||||
Current set 7: - - - -
|
||||
L1 MISS
|
||||
L1 UPDATE LRU
|
||||
Changed set 7: 100035 - - -
|
||||
# 7 : Read 4000d4e8
|
||||
L1 Read: 4000d4e8(tag 100035, index 7)
|
||||
Current set 7: 100035 - - -
|
||||
L1 HIT
|
||||
L1 UPDATE LRU
|
||||
Changed set 7: 100035 - - -
|
||||
# 8 : Read 4001b388
|
||||
L1 Read: 4001b388(tag 10006c, index 28)
|
||||
Current set 28: - - - -
|
||||
L1 MISS
|
||||
L1 UPDATE LRU
|
||||
Changed set 28: 10006c - - -
|
||||
# 9 : Read 4001b378
|
||||
L1 Read: 4001b378(tag 10006c, index 27)
|
||||
Current set 27: 10006c - - -
|
||||
L1 HIT
|
||||
L1 UPDATE LRU
|
||||
Changed set 27: 10006c - - -
|
||||
# 10 : Read 4000d50f
|
||||
L1 Read: 4000d50f(tag 100035, index 8)
|
||||
Current set 8: - - - -
|
||||
L1 MISS
|
||||
L1 UPDATE LRU
|
||||
Changed set 8: 100035 - - -
|
||||
# 11 : Read 4000d50f
|
||||
L1 Read: 4000d50f(tag 100035, index 8)
|
||||
Current set 8: 100035 - - -
|
||||
L1 HIT
|
||||
L1 UPDATE LRU
|
||||
Changed set 8: 100035 - - -
|
||||
# 12 : Write 400160b8
|
||||
L1 Write: 400160b8(tag 100058, index 5)
|
||||
Current set 5: - - - -
|
||||
L1 MISS, WRITE THROUGH
|
||||
Changed set 5: - - - -
|
||||
# 13 : Write 40013c30
|
||||
L1 Write: 40013c30(tag 10004f, index 1)
|
||||
Current set 1: - - - -
|
||||
L1 MISS, WRITE THROUGH
|
||||
Changed set 1: - - - -
|
||||
# 14 : Write 40013c00
|
||||
L1 Write: 40013c00(tag 10004f, index 0)
|
||||
Current set 0: - - - -
|
||||
L1 MISS, WRITE THROUGH
|
||||
Changed set 0: - - - -
|
||||
# 15 : Read 4000d550
|
||||
L1 Read: 4000d550(tag 100035, index 10)
|
||||
Current set 10: - - - -
|
||||
L1 MISS
|
||||
L1 UPDATE LRU
|
||||
Changed set 10: 100035 - - -
|
||||
# 16 : Read 4000d4d8
|
||||
L1 Read: 4000d4d8(tag 100035, index 6)
|
||||
Current set 6: - - - -
|
||||
L1 MISS
|
||||
L1 UPDATE LRU
|
||||
Changed set 6: 100035 - - -
|
||||
# 17 : Read 4001b378
|
||||
L1 Read: 4001b378(tag 10006c, index 27)
|
||||
Current set 27: 10006c - - -
|
||||
L1 HIT
|
||||
L1 UPDATE LRU
|
||||
Changed set 27: 10006c - - -
|
||||
# 18 : Read 4001b388
|
||||
L1 Read: 4001b388(tag 10006c, index 28)
|
||||
Current set 28: 10006c - - -
|
||||
L1 HIT
|
||||
L1 UPDATE LRU
|
||||
Changed set 28: 10006c - - -
|
||||
# 19 : Write 40013350
|
||||
L1 Write: 40013350(tag 10004c, index 26)
|
||||
Current set 26: - - - -
|
||||
L1 MISS, WRITE THROUGH
|
||||
Changed set 26: - - - -
|
||||
# 20 : Read 4000d45c
|
||||
L1 Read: 4000d45c(tag 100035, index 2)
|
||||
Current set 2: - - - -
|
||||
L1 MISS
|
||||
L1 UPDATE LRU
|
||||
Changed set 2: 100035 - - -
|
||||
# 21 : Read 400160a0
|
||||
L1 Read: 400160a0(tag 100058, index 5)
|
||||
Current set 5: - - - -
|
||||
L1 MISS
|
||||
L1 UPDATE LRU
|
||||
Changed set 5: 100058 - - -
|
||||
# 22 : Read 4001b3a0
|
||||
L1 Read: 4001b3a0(tag 10006c, index 29)
|
||||
Current set 29: - - - -
|
||||
L1 MISS
|
||||
L1 UPDATE LRU
|
||||
Changed set 29: 10006c - - -
|
||||
# 23 : Read 4000caa4
|
||||
L1 Read: 4000caa4(tag 100032, index 21)
|
||||
Current set 21: - - - -
|
||||
L1 MISS
|
||||
L1 UPDATE LRU
|
||||
Changed set 21: 100032 - - -
|
||||
# 24 : Read 4001b3a1
|
||||
L1 Read: 4001b3a1(tag 10006c, index 29)
|
||||
Current set 29: 10006c - - -
|
||||
L1 HIT
|
||||
L1 UPDATE LRU
|
||||
Changed set 29: 10006c - - -
|
||||
# 25 : Read 4000caa4
|
||||
L1 Read: 4000caa4(tag 100032, index 21)
|
||||
Current set 21: 100032 - - -
|
||||
L1 HIT
|
||||
L1 UPDATE LRU
|
||||
Changed set 21: 100032 - - -
|
||||
# 26 : Read 4001b3a2
|
||||
L1 Read: 4001b3a2(tag 10006c, index 29)
|
||||
Current set 29: 10006c - - -
|
||||
L1 HIT
|
||||
L1 UPDATE LRU
|
||||
Changed set 29: 10006c - - -
|
||||
# 27 : Read 4000cb14
|
||||
L1 Read: 4000cb14(tag 100032, index 24)
|
||||
Current set 24: - - - -
|
||||
L1 MISS
|
||||
L1 UPDATE LRU
|
||||
Changed set 24: 100032 - - -
|
||||
# 28 : Read 4000d524
|
||||
L1 Read: 4000d524(tag 100035, index 9)
|
||||
Current set 9: - - - -
|
||||
L1 MISS
|
||||
L1 UPDATE LRU
|
||||
Changed set 9: 100035 - - -
|
||||
# 29 : Read 4000d624
|
||||
L1 Read: 4000d624(tag 100035, index 17)
|
||||
Current set 17: - - - -
|
||||
L1 MISS
|
||||
L1 UPDATE LRU
|
||||
Changed set 17: 100035 - - -
|
||||
# 30 : Read 4001b3a3
|
||||
L1 Read: 4001b3a3(tag 10006c, index 29)
|
||||
Current set 29: 10006c - - -
|
||||
L1 HIT
|
||||
L1 UPDATE LRU
|
||||
Changed set 29: 10006c - - -
|
||||
# 31 : Read 4000b8a3
|
||||
L1 Read: 4000b8a3(tag 10002e, index 5)
|
||||
Current set 5: 100058 - - -
|
||||
L1 MISS
|
||||
L1 UPDATE LRU
|
||||
Changed set 5: 100058 10002e - -
|
||||
# 32 : Read 40013350
|
||||
L1 Read: 40013350(tag 10004c, index 26)
|
||||
Current set 26: - - - -
|
||||
L1 MISS
|
||||
L1 UPDATE LRU
|
||||
Changed set 26: 10004c - - -
|
||||
# 33 : Write 400160e4
|
||||
L1 Write: 400160e4(tag 100058, index 7)
|
||||
Current set 7: 100035 - - -
|
||||
L1 MISS, WRITE THROUGH
|
||||
Changed set 7: 100035 - - -
|
||||
# 34 : Read 4001b3a3
|
||||
L1 Read: 4001b3a3(tag 10006c, index 29)
|
||||
Current set 29: 10006c - - -
|
||||
L1 HIT
|
||||
L1 UPDATE LRU
|
||||
Changed set 29: 10006c - - -
|
||||
# 35 : Read 4000d620
|
||||
L1 Read: 4000d620(tag 100035, index 17)
|
||||
Current set 17: 100035 - - -
|
||||
L1 HIT
|
||||
L1 UPDATE LRU
|
||||
Changed set 17: 100035 - - -
|
||||
# 36 : Read 4000b517
|
||||
L1 Read: 4000b517(tag 10002d, index 8)
|
||||
Current set 8: 100035 - - -
|
||||
L1 MISS
|
||||
L1 UPDATE LRU
|
||||
Changed set 8: 100035 10002d - -
|
||||
# 37 : Read 4000d624
|
||||
L1 Read: 4000d624(tag 100035, index 17)
|
||||
Current set 17: 100035 - - -
|
||||
L1 HIT
|
||||
L1 UPDATE LRU
|
||||
Changed set 17: 100035 - - -
|
||||
# 38 : Read 4001b3a3
|
||||
L1 Read: 4001b3a3(tag 10006c, index 29)
|
||||
Current set 29: 10006c - - -
|
||||
L1 HIT
|
||||
L1 UPDATE LRU
|
||||
Changed set 29: 10006c - - -
|
||||
# 39 : Read 4000b8a3
|
||||
L1 Read: 4000b8a3(tag 10002e, index 5)
|
||||
Current set 5: 100058 10002e - -
|
||||
L1 HIT
|
||||
L1 UPDATE LRU
|
||||
Changed set 5: 100058 10002e - -
|
||||
# 40 : Read 4001b3a3
|
||||
L1 Read: 4001b3a3(tag 10006c, index 29)
|
||||
Current set 29: 10006c - - -
|
||||
L1 HIT
|
||||
L1 UPDATE LRU
|
||||
Changed set 29: 10006c - - -
|
||||
# 41 : Write 400191f0
|
||||
L1 Write: 400191f0(tag 100064, index 15)
|
||||
Current set 15: - - - -
|
||||
L1 MISS, WRITE THROUGH
|
||||
Changed set 15: - - - -
|
||||
# 42 : Read 4001b3a4
|
||||
L1 Read: 4001b3a4(tag 10006c, index 29)
|
||||
Current set 29: 10006c - - -
|
||||
L1 HIT
|
||||
L1 UPDATE LRU
|
||||
Changed set 29: 10006c - - -
|
||||
# 43 : Read 4000b8ac
|
||||
L1 Read: 4000b8ac(tag 10002e, index 5)
|
||||
Current set 5: 100058 10002e - -
|
||||
L1 HIT
|
||||
L1 UPDATE LRU
|
||||
Changed set 5: 100058 10002e - -
|
||||
# 44 : Read 4001b3a4
|
||||
L1 Read: 4001b3a4(tag 10006c, index 29)
|
||||
Current set 29: 10006c - - -
|
||||
L1 HIT
|
||||
L1 UPDATE LRU
|
||||
Changed set 29: 10006c - - -
|
||||
# 45 : Write 400191f1
|
||||
L1 Write: 400191f1(tag 100064, index 15)
|
||||
Current set 15: - - - -
|
||||
L1 MISS, WRITE THROUGH
|
||||
Changed set 15: - - - -
|
||||
# 46 : Read 4001b3a5
|
||||
L1 Read: 4001b3a5(tag 10006c, index 29)
|
||||
Current set 29: 10006c - - -
|
||||
L1 HIT
|
||||
L1 UPDATE LRU
|
||||
Changed set 29: 10006c - - -
|
||||
# 47 : Read 4000b8b2
|
||||
L1 Read: 4000b8b2(tag 10002e, index 5)
|
||||
Current set 5: 100058 10002e - -
|
||||
L1 HIT
|
||||
L1 UPDATE LRU
|
||||
Changed set 5: 100058 10002e - -
|
||||
# 48 : Read 4001b3a5
|
||||
L1 Read: 4001b3a5(tag 10006c, index 29)
|
||||
Current set 29: 10006c - - -
|
||||
L1 HIT
|
||||
L1 UPDATE LRU
|
||||
Changed set 29: 10006c - - -
|
||||
# 49 : Write 400191f2
|
||||
L1 Write: 400191f2(tag 100064, index 15)
|
||||
Current set 15: - - - -
|
||||
L1 MISS, WRITE THROUGH
|
||||
Changed set 15: - - - -
|
||||
# 50 : Read 4001b3a6
|
||||
L1 Read: 4001b3a6(tag 10006c, index 29)
|
||||
Current set 29: 10006c - - -
|
||||
L1 HIT
|
||||
L1 UPDATE LRU
|
||||
Changed set 29: 10006c - - -
|
||||
# 51 : Read 4000b8ab
|
||||
L1 Read: 4000b8ab(tag 10002e, index 5)
|
||||
Current set 5: 100058 10002e - -
|
||||
L1 HIT
|
||||
L1 UPDATE LRU
|
||||
Changed set 5: 100058 10002e - -
|
||||
# 52 : Read 4001b3a6
|
||||
L1 Read: 4001b3a6(tag 10006c, index 29)
|
||||
Current set 29: 10006c - - -
|
||||
L1 HIT
|
||||
L1 UPDATE LRU
|
||||
Changed set 29: 10006c - - -
|
||||
# 53 : Write 400191f3
|
||||
L1 Write: 400191f3(tag 100064, index 15)
|
||||
Current set 15: - - - -
|
||||
L1 MISS, WRITE THROUGH
|
||||
Changed set 15: - - - -
|
||||
# 54 : Read 4001b3a7
|
||||
L1 Read: 4001b3a7(tag 10006c, index 29)
|
||||
Current set 29: 10006c - - -
|
||||
L1 HIT
|
||||
L1 UPDATE LRU
|
||||
Changed set 29: 10006c - - -
|
||||
# 55 : Read 4000b8a1
|
||||
L1 Read: 4000b8a1(tag 10002e, index 5)
|
||||
Current set 5: 100058 10002e - -
|
||||
L1 HIT
|
||||
L1 UPDATE LRU
|
||||
Changed set 5: 100058 10002e - -
|
||||
# 56 : Read 4001b3a7
|
||||
L1 Read: 4001b3a7(tag 10006c, index 29)
|
||||
Current set 29: 10006c - - -
|
||||
L1 HIT
|
||||
L1 UPDATE LRU
|
||||
Changed set 29: 10006c - - -
|
||||
# 57 : Write 400191f4
|
||||
L1 Write: 400191f4(tag 100064, index 15)
|
||||
Current set 15: - - - -
|
||||
L1 MISS, WRITE THROUGH
|
||||
Changed set 15: - - - -
|
||||
# 58 : Read 4001b3a8
|
||||
L1 Read: 4001b3a8(tag 10006c, index 29)
|
||||
Current set 29: 10006c - - -
|
||||
L1 HIT
|
||||
L1 UPDATE LRU
|
||||
Changed set 29: 10006c - - -
|
||||
# 59 : Read 4000b85d
|
||||
L1 Read: 4000b85d(tag 10002e, index 2)
|
||||
Current set 2: 100035 - - -
|
||||
L1 MISS
|
||||
L1 UPDATE LRU
|
||||
Changed set 2: 100035 10002e - -
|
||||
# 60 : Read 4001b3a8
|
||||
L1 Read: 4001b3a8(tag 10006c, index 29)
|
||||
Current set 29: 10006c - - -
|
||||
L1 HIT
|
||||
L1 UPDATE LRU
|
||||
Changed set 29: 10006c - - -
|
||||
# 61 : Read 4000b4d1
|
||||
L1 Read: 4000b4d1(tag 10002d, index 6)
|
||||
Current set 6: 100035 - - -
|
||||
L1 MISS
|
||||
L1 UPDATE LRU
|
||||
Changed set 6: 100035 10002d - -
|
||||
# 62 : Read 400191f4
|
||||
L1 Read: 400191f4(tag 100064, index 15)
|
||||
Current set 15: - - - -
|
||||
L1 MISS
|
||||
L1 UPDATE LRU
|
||||
Changed set 15: 100064 - - -
|
||||
# 63 : Write 400191f5
|
||||
L1 Write: 400191f5(tag 100064, index 15)
|
||||
Current set 15: 100064 - - -
|
||||
L1 HIT
|
||||
L1 UPDATE LRU
|
||||
Changed set 15: 100064 - - -
|
||||
# 64 : Read 400191f0
|
||||
L1 Read: 400191f0(tag 100064, index 15)
|
||||
Current set 15: 100064 - - -
|
||||
L1 HIT
|
||||
L1 UPDATE LRU
|
||||
Changed set 15: 100064 - - -
|
||||
# 65 : Read 400191f0
|
||||
L1 Read: 400191f0(tag 100064, index 15)
|
||||
Current set 15: 100064 - - -
|
||||
L1 HIT
|
||||
L1 UPDATE LRU
|
||||
Changed set 15: 100064 - - -
|
||||
# 66 : Read 4000d620
|
||||
L1 Read: 4000d620(tag 100035, index 17)
|
||||
Current set 17: 100035 - - -
|
||||
L1 HIT
|
||||
L1 UPDATE LRU
|
||||
Changed set 17: 100035 - - -
|
||||
# 67 : Read 400191f0
|
||||
L1 Read: 400191f0(tag 100064, index 15)
|
||||
Current set 15: 100064 - - -
|
||||
L1 HIT
|
||||
L1 UPDATE LRU
|
||||
Changed set 15: 100064 - - -
|
||||
# 68 : Read 4000b517
|
||||
L1 Read: 4000b517(tag 10002d, index 8)
|
||||
Current set 8: 100035 10002d - -
|
||||
L1 HIT
|
||||
L1 UPDATE LRU
|
||||
Changed set 8: 100035 10002d - -
|
||||
# 69 : Read 400191f0
|
||||
L1 Read: 400191f0(tag 100064, index 15)
|
||||
Current set 15: 100064 - - -
|
||||
L1 HIT
|
||||
L1 UPDATE LRU
|
||||
Changed set 15: 100064 - - -
|
||||
# 70 : Read 400191f0
|
||||
L1 Read: 400191f0(tag 100064, index 15)
|
||||
Current set 15: 100064 - - -
|
||||
L1 HIT
|
||||
L1 UPDATE LRU
|
||||
Changed set 15: 100064 - - -
|
||||
# 71 : Read 400191f1
|
||||
L1 Read: 400191f1(tag 100064, index 15)
|
||||
Current set 15: 100064 - - -
|
||||
L1 HIT
|
||||
L1 UPDATE LRU
|
||||
Changed set 15: 100064 - - -
|
||||
# 72 : Read 400191f1
|
||||
L1 Read: 400191f1(tag 100064, index 15)
|
||||
Current set 15: 100064 - - -
|
||||
L1 HIT
|
||||
L1 UPDATE LRU
|
||||
Changed set 15: 100064 - - -
|
||||
# 73 : Read 400191f2
|
||||
L1 Read: 400191f2(tag 100064, index 15)
|
||||
Current set 15: 100064 - - -
|
||||
L1 HIT
|
||||
L1 UPDATE LRU
|
||||
Changed set 15: 100064 - - -
|
||||
# 74 : Read 400191f2
|
||||
L1 Read: 400191f2(tag 100064, index 15)
|
||||
Current set 15: 100064 - - -
|
||||
L1 HIT
|
||||
L1 UPDATE LRU
|
||||
Changed set 15: 100064 - - -
|
||||
# 75 : Read 400191f3
|
||||
L1 Read: 400191f3(tag 100064, index 15)
|
||||
Current set 15: 100064 - - -
|
||||
L1 HIT
|
||||
L1 UPDATE LRU
|
||||
Changed set 15: 100064 - - -
|
||||
# 76 : Read 400191f3
|
||||
L1 Read: 400191f3(tag 100064, index 15)
|
||||
Current set 15: 100064 - - -
|
||||
L1 HIT
|
||||
L1 UPDATE LRU
|
||||
Changed set 15: 100064 - - -
|
||||
# 77 : Read 400191f4
|
||||
L1 Read: 400191f4(tag 100064, index 15)
|
||||
Current set 15: 100064 - - -
|
||||
L1 HIT
|
||||
L1 UPDATE LRU
|
||||
Changed set 15: 100064 - - -
|
||||
# 78 : Read 400191f4
|
||||
L1 Read: 400191f4(tag 100064, index 15)
|
||||
Current set 15: 100064 - - -
|
||||
L1 HIT
|
||||
L1 UPDATE LRU
|
||||
Changed set 15: 100064 - - -
|
||||
# 79 : Read 400191f5
|
||||
L1 Read: 400191f5(tag 100064, index 15)
|
||||
Current set 15: 100064 - - -
|
||||
L1 HIT
|
||||
L1 UPDATE LRU
|
||||
Changed set 15: 100064 - - -
|
||||
# 80 : Read 4000d624
|
||||
L1 Read: 4000d624(tag 100035, index 17)
|
||||
Current set 17: 100035 - - -
|
||||
L1 HIT
|
||||
L1 UPDATE LRU
|
||||
Changed set 17: 100035 - - -
|
||||
# 81 : Read 4000b8a3
|
||||
L1 Read: 4000b8a3(tag 10002e, index 5)
|
||||
Current set 5: 100058 10002e - -
|
||||
L1 HIT
|
||||
L1 UPDATE LRU
|
||||
Changed set 5: 100058 10002e - -
|
||||
# 82 : Read 4000d45c
|
||||
L1 Read: 4000d45c(tag 100035, index 2)
|
||||
Current set 2: 100035 10002e - -
|
||||
L1 HIT
|
||||
L1 UPDATE LRU
|
||||
Changed set 2: 100035 10002e - -
|
||||
# 83 : Read 40013c38
|
||||
L1 Read: 40013c38(tag 10004f, index 1)
|
||||
Current set 1: - - - -
|
||||
L1 MISS
|
||||
L1 UPDATE LRU
|
||||
Changed set 1: 10004f - - -
|
||||
# 84 : Read 4001b438
|
||||
L1 Read: 4001b438(tag 10006d, index 1)
|
||||
Current set 1: 10004f - - -
|
||||
L1 MISS
|
||||
L1 UPDATE LRU
|
||||
Changed set 1: 10004f 10006d - -
|
||||
# 85 : Read 4001b458
|
||||
L1 Read: 4001b458(tag 10006d, index 2)
|
||||
Current set 2: 100035 10002e - -
|
||||
L1 MISS
|
||||
L1 UPDATE LRU
|
||||
Changed set 2: 100035 10002e 10006d -
|
||||
# 86 : Read 400191f0
|
||||
L1 Read: 400191f0(tag 100064, index 15)
|
||||
Current set 15: 100064 - - -
|
||||
L1 HIT
|
||||
L1 UPDATE LRU
|
||||
Changed set 15: 100064 - - -
|
||||
# 87 : Read 400191f1
|
||||
L1 Read: 400191f1(tag 100064, index 15)
|
||||
Current set 15: 100064 - - -
|
||||
L1 HIT
|
||||
L1 UPDATE LRU
|
||||
Changed set 15: 100064 - - -
|
||||
# 88 : Read 400191f4
|
||||
L1 Read: 400191f4(tag 100064, index 15)
|
||||
Current set 15: 100064 - - -
|
||||
L1 HIT
|
||||
L1 UPDATE LRU
|
||||
Changed set 15: 100064 - - -
|
||||
# 89 : Read 4001b438
|
||||
L1 Read: 4001b438(tag 10006d, index 1)
|
||||
Current set 1: 10004f 10006d - -
|
||||
L1 HIT
|
||||
L1 UPDATE LRU
|
||||
Changed set 1: 10004f 10006d - -
|
||||
# 90 : Read 4001b43c
|
||||
L1 Read: 4001b43c(tag 10006d, index 1)
|
||||
Current set 1: 10004f 10006d - -
|
||||
L1 HIT
|
||||
L1 UPDATE LRU
|
||||
Changed set 1: 10004f 10006d - -
|
||||
# 91 : Read 4001b638
|
||||
L1 Read: 4001b638(tag 10006d, index 17)
|
||||
Current set 17: 100035 - - -
|
||||
L1 MISS
|
||||
L1 UPDATE LRU
|
||||
Changed set 17: 100035 10006d - -
|
||||
# 92 : Read 4000d4b8
|
||||
L1 Read: 4000d4b8(tag 100035, index 5)
|
||||
Current set 5: 100058 10002e - -
|
||||
L1 MISS
|
||||
L1 UPDATE LRU
|
||||
Changed set 5: 100058 10002e 100035 -
|
||||
# 93 : Write 7b033c74
|
||||
L1 Write: 7b033c74(tag 1ec0cf, index 3)
|
||||
Current set 3: - - - -
|
||||
L1 MISS, WRITE THROUGH
|
||||
Changed set 3: - - - -
|
||||
# 94 : Read 7b033c74
|
||||
L1 Read: 7b033c74(tag 1ec0cf, index 3)
|
||||
Current set 3: - - - -
|
||||
L1 MISS
|
||||
L1 UPDATE LRU
|
||||
Changed set 3: 1ec0cf - - -
|
||||
# 95 : Read 4001b438
|
||||
L1 Read: 4001b438(tag 10006d, index 1)
|
||||
Current set 1: 10004f 10006d - -
|
||||
L1 HIT
|
||||
L1 UPDATE LRU
|
||||
Changed set 1: 10004f 10006d - -
|
||||
# 96 : Read 4001b438
|
||||
L1 Read: 4001b438(tag 10006d, index 1)
|
||||
Current set 1: 10004f 10006d - -
|
||||
L1 HIT
|
||||
L1 UPDATE LRU
|
||||
Changed set 1: 10004f 10006d - -
|
||||
# 97 : Read 4001b43c
|
||||
L1 Read: 4001b43c(tag 10006d, index 1)
|
||||
Current set 1: 10004f 10006d - -
|
||||
L1 HIT
|
||||
L1 UPDATE LRU
|
||||
Changed set 1: 10004f 10006d - -
|
||||
# 98 : Read 4001b638
|
||||
L1 Read: 4001b638(tag 10006d, index 17)
|
||||
Current set 17: 100035 10006d - -
|
||||
L1 HIT
|
||||
L1 UPDATE LRU
|
||||
Changed set 17: 100035 10006d - -
|
||||
# 99 : Write 4001f550
|
||||
L1 Write: 4001f550(tag 10007d, index 10)
|
||||
Current set 10: 100035 - - -
|
||||
L1 MISS, WRITE THROUGH
|
||||
Changed set 10: 100035 - - -
|
||||
# 100 : Write 4001f60d
|
||||
L1 Write: 4001f60d(tag 10007d, index 16)
|
||||
Current set 16: - - - -
|
||||
L1 MISS, WRITE THROUGH
|
||||
Changed set 16: - - - -
|
||||
|
|
@ -0,0 +1,619 @@
|
|||
# 1 : Write 400341a0
|
||||
L1 Write: 400341a0(tag 40034, index 6)
|
||||
Current set 6: - -
|
||||
L1 MISS
|
||||
Count_Block Update
|
||||
L1 SET DIRTY
|
||||
Changed set 6: 40034 D -
|
||||
# 2 : Read dfcfa8
|
||||
L1 Read: dfcfa8(tag dfc, index 62)
|
||||
Current set 62: - -
|
||||
L1 MISS
|
||||
Count_Block Update
|
||||
Changed set 62: dfc -
|
||||
# 3 : Write 7b034dd4
|
||||
L1 Write: 7b034dd4(tag 7b034, index 55)
|
||||
Current set 55: - -
|
||||
L1 MISS
|
||||
Count_Block Update
|
||||
L1 SET DIRTY
|
||||
Changed set 55: 7b034 D -
|
||||
# 4 : Read df7c48
|
||||
L1 Read: df7c48(tag df7, index 49)
|
||||
Current set 49: - -
|
||||
L1 MISS
|
||||
Count_Block Update
|
||||
Changed set 49: df7 -
|
||||
# 5 : Read 7b034dd4
|
||||
L1 Read: 7b034dd4(tag 7b034, index 55)
|
||||
Current set 55: 7b034 D -
|
||||
L1 HIT
|
||||
Count_Block Update
|
||||
Changed set 55: 7b034 D -
|
||||
# 6 : Read 423aebbc
|
||||
L1 Read: 423aebbc(tag 423ae, index 46)
|
||||
Current set 46: - -
|
||||
L1 MISS
|
||||
Count_Block Update
|
||||
Changed set 46: 423ae -
|
||||
# 7 : Read 423aebb8
|
||||
L1 Read: 423aebb8(tag 423ae, index 46)
|
||||
Current set 46: 423ae -
|
||||
L1 HIT
|
||||
Count_Block Update
|
||||
Changed set 46: 423ae -
|
||||
# 8 : Read 423aebbc
|
||||
L1 Read: 423aebbc(tag 423ae, index 46)
|
||||
Current set 46: 423ae -
|
||||
L1 HIT
|
||||
Count_Block Update
|
||||
Changed set 46: 423ae -
|
||||
# 9 : Read 40002634
|
||||
L1 Read: 40002634(tag 40002, index 24)
|
||||
Current set 24: - -
|
||||
L1 MISS
|
||||
Count_Block Update
|
||||
Changed set 24: 40002 -
|
||||
# 10 : Write 40139dd0
|
||||
L1 Write: 40139dd0(tag 40139, index 55)
|
||||
Current set 55: 7b034 D -
|
||||
L1 MISS
|
||||
Count_Block Update
|
||||
L1 SET DIRTY
|
||||
Changed set 55: 7b034 D 40139 D
|
||||
# 11 : Read 423aeb9c
|
||||
L1 Read: 423aeb9c(tag 423ae, index 46)
|
||||
Current set 46: 423ae -
|
||||
L1 HIT
|
||||
Count_Block Update
|
||||
Changed set 46: 423ae -
|
||||
# 12 : Write 40139dd4
|
||||
L1 Write: 40139dd4(tag 40139, index 55)
|
||||
Current set 55: 7b034 D 40139 D
|
||||
L1 HIT
|
||||
Count_Block Update
|
||||
L1 SET DIRTY
|
||||
Changed set 55: 7b034 D 40139 D
|
||||
# 13 : Write 40138938
|
||||
L1 Write: 40138938(tag 40138, index 36)
|
||||
Current set 36: - -
|
||||
L1 MISS
|
||||
Count_Block Update
|
||||
L1 SET DIRTY
|
||||
Changed set 36: 40138 D -
|
||||
# 14 : Read 423aeba0
|
||||
L1 Read: 423aeba0(tag 423ae, index 46)
|
||||
Current set 46: 423ae -
|
||||
L1 HIT
|
||||
Count_Block Update
|
||||
Changed set 46: 423ae -
|
||||
# 15 : Write 4013893c
|
||||
L1 Write: 4013893c(tag 40138, index 36)
|
||||
Current set 36: 40138 D -
|
||||
L1 HIT
|
||||
Count_Block Update
|
||||
L1 SET DIRTY
|
||||
Changed set 36: 40138 D -
|
||||
# 16 : Read 7b034dcc
|
||||
L1 Read: 7b034dcc(tag 7b034, index 55)
|
||||
Current set 55: 7b034 D 40139 D
|
||||
L1 HIT
|
||||
Count_Block Update
|
||||
Changed set 55: 7b034 D 40139 D
|
||||
# 17 : Read df8a70
|
||||
L1 Read: df8a70(tag df8, index 41)
|
||||
Current set 41: - -
|
||||
L1 MISS
|
||||
Count_Block Update
|
||||
Changed set 41: df8 -
|
||||
# 18 : Write 7b034c50
|
||||
L1 Write: 7b034c50(tag 7b034, index 49)
|
||||
Current set 49: df7 -
|
||||
L1 MISS
|
||||
Count_Block Update
|
||||
L1 SET DIRTY
|
||||
Changed set 49: df7 7b034 D
|
||||
# 19 : Write 7b034c68
|
||||
L1 Write: 7b034c68(tag 7b034, index 49)
|
||||
Current set 49: df7 7b034 D
|
||||
L1 HIT
|
||||
Count_Block Update
|
||||
L1 SET DIRTY
|
||||
Changed set 49: df7 7b034 D
|
||||
# 20 : Read df9f10
|
||||
L1 Read: df9f10(tag df9, index 60)
|
||||
Current set 60: - -
|
||||
L1 MISS
|
||||
Count_Block Update
|
||||
Changed set 60: df9 -
|
||||
# 21 : Write 7b034da8
|
||||
L1 Write: 7b034da8(tag 7b034, index 54)
|
||||
Current set 54: - -
|
||||
L1 MISS
|
||||
Count_Block Update
|
||||
L1 SET DIRTY
|
||||
Changed set 54: 7b034 D -
|
||||
# 22 : Read 7b034dcc
|
||||
L1 Read: 7b034dcc(tag 7b034, index 55)
|
||||
Current set 55: 7b034 D 40139 D
|
||||
L1 HIT
|
||||
Count_Block Update
|
||||
Changed set 55: 7b034 D 40139 D
|
||||
# 23 : Read df8a74
|
||||
L1 Read: df8a74(tag df8, index 41)
|
||||
Current set 41: df8 -
|
||||
L1 HIT
|
||||
Count_Block Update
|
||||
Changed set 41: df8 -
|
||||
# 24 : Write 7b034c54
|
||||
L1 Write: 7b034c54(tag 7b034, index 49)
|
||||
Current set 49: df7 7b034 D
|
||||
L1 HIT
|
||||
Count_Block Update
|
||||
L1 SET DIRTY
|
||||
Changed set 49: df7 7b034 D
|
||||
# 25 : Write 7b034c6c
|
||||
L1 Write: 7b034c6c(tag 7b034, index 49)
|
||||
Current set 49: df7 7b034 D
|
||||
L1 HIT
|
||||
Count_Block Update
|
||||
L1 SET DIRTY
|
||||
Changed set 49: df7 7b034 D
|
||||
# 26 : Read df9f14
|
||||
L1 Read: df9f14(tag df9, index 60)
|
||||
Current set 60: df9 -
|
||||
L1 HIT
|
||||
Count_Block Update
|
||||
Changed set 60: df9 -
|
||||
# 27 : Write 7b034dac
|
||||
L1 Write: 7b034dac(tag 7b034, index 54)
|
||||
Current set 54: 7b034 D -
|
||||
L1 HIT
|
||||
Count_Block Update
|
||||
L1 SET DIRTY
|
||||
Changed set 54: 7b034 D -
|
||||
# 28 : Read 40138938
|
||||
L1 Read: 40138938(tag 40138, index 36)
|
||||
Current set 36: 40138 D -
|
||||
L1 HIT
|
||||
Count_Block Update
|
||||
Changed set 36: 40138 D -
|
||||
# 29 : Write 7b034d90
|
||||
L1 Write: 7b034d90(tag 7b034, index 54)
|
||||
Current set 54: 7b034 D -
|
||||
L1 HIT
|
||||
Count_Block Update
|
||||
L1 SET DIRTY
|
||||
Changed set 54: 7b034 D -
|
||||
# 30 : Read 7b034c68
|
||||
L1 Read: 7b034c68(tag 7b034, index 49)
|
||||
Current set 49: df7 7b034 D
|
||||
L1 HIT
|
||||
Count_Block Update
|
||||
Changed set 49: df7 7b034 D
|
||||
# 31 : Read df84d4
|
||||
L1 Read: df84d4(tag df8, index 19)
|
||||
Current set 19: - -
|
||||
L1 MISS
|
||||
Count_Block Update
|
||||
Changed set 19: df8 -
|
||||
# 32 : Read df84d5
|
||||
L1 Read: df84d5(tag df8, index 19)
|
||||
Current set 19: df8 -
|
||||
L1 HIT
|
||||
Count_Block Update
|
||||
Changed set 19: df8 -
|
||||
# 33 : Read df84d6
|
||||
L1 Read: df84d6(tag df8, index 19)
|
||||
Current set 19: df8 -
|
||||
L1 HIT
|
||||
Count_Block Update
|
||||
Changed set 19: df8 -
|
||||
# 34 : Read df84d7
|
||||
L1 Read: df84d7(tag df8, index 19)
|
||||
Current set 19: df8 -
|
||||
L1 HIT
|
||||
Count_Block Update
|
||||
Changed set 19: df8 -
|
||||
# 35 : Read df84d8
|
||||
L1 Read: df84d8(tag df8, index 19)
|
||||
Current set 19: df8 -
|
||||
L1 HIT
|
||||
Count_Block Update
|
||||
Changed set 19: df8 -
|
||||
# 36 : Read df84d9
|
||||
L1 Read: df84d9(tag df8, index 19)
|
||||
Current set 19: df8 -
|
||||
L1 HIT
|
||||
Count_Block Update
|
||||
Changed set 19: df8 -
|
||||
# 37 : Read df84da
|
||||
L1 Read: df84da(tag df8, index 19)
|
||||
Current set 19: df8 -
|
||||
L1 HIT
|
||||
Count_Block Update
|
||||
Changed set 19: df8 -
|
||||
# 38 : Read df84db
|
||||
L1 Read: df84db(tag df8, index 19)
|
||||
Current set 19: df8 -
|
||||
L1 HIT
|
||||
Count_Block Update
|
||||
Changed set 19: df8 -
|
||||
# 39 : Read df84dc
|
||||
L1 Read: df84dc(tag df8, index 19)
|
||||
Current set 19: df8 -
|
||||
L1 HIT
|
||||
Count_Block Update
|
||||
Changed set 19: df8 -
|
||||
# 40 : Read df84dd
|
||||
L1 Read: df84dd(tag df8, index 19)
|
||||
Current set 19: df8 -
|
||||
L1 HIT
|
||||
Count_Block Update
|
||||
Changed set 19: df8 -
|
||||
# 41 : Read df84de
|
||||
L1 Read: df84de(tag df8, index 19)
|
||||
Current set 19: df8 -
|
||||
L1 HIT
|
||||
Count_Block Update
|
||||
Changed set 19: df8 -
|
||||
# 42 : Read df84df
|
||||
L1 Read: df84df(tag df8, index 19)
|
||||
Current set 19: df8 -
|
||||
L1 HIT
|
||||
Count_Block Update
|
||||
Changed set 19: df8 -
|
||||
# 43 : Read df84e0
|
||||
L1 Read: df84e0(tag df8, index 19)
|
||||
Current set 19: df8 -
|
||||
L1 HIT
|
||||
Count_Block Update
|
||||
Changed set 19: df8 -
|
||||
# 44 : Read df84e1
|
||||
L1 Read: df84e1(tag df8, index 19)
|
||||
Current set 19: df8 -
|
||||
L1 HIT
|
||||
Count_Block Update
|
||||
Changed set 19: df8 -
|
||||
# 45 : Read df84e2
|
||||
L1 Read: df84e2(tag df8, index 19)
|
||||
Current set 19: df8 -
|
||||
L1 HIT
|
||||
Count_Block Update
|
||||
Changed set 19: df8 -
|
||||
# 46 : Read df84e3
|
||||
L1 Read: df84e3(tag df8, index 19)
|
||||
Current set 19: df8 -
|
||||
L1 HIT
|
||||
Count_Block Update
|
||||
Changed set 19: df8 -
|
||||
# 47 : Read 4013893c
|
||||
L1 Read: 4013893c(tag 40138, index 36)
|
||||
Current set 36: 40138 D -
|
||||
L1 HIT
|
||||
Count_Block Update
|
||||
Changed set 36: 40138 D -
|
||||
# 48 : Write 7b034d94
|
||||
L1 Write: 7b034d94(tag 7b034, index 54)
|
||||
Current set 54: 7b034 D -
|
||||
L1 HIT
|
||||
Count_Block Update
|
||||
L1 SET DIRTY
|
||||
Changed set 54: 7b034 D -
|
||||
# 49 : Read 7b034c6c
|
||||
L1 Read: 7b034c6c(tag 7b034, index 49)
|
||||
Current set 49: df7 7b034 D
|
||||
L1 HIT
|
||||
Count_Block Update
|
||||
Changed set 49: df7 7b034 D
|
||||
# 50 : Read df84e4
|
||||
L1 Read: df84e4(tag df8, index 19)
|
||||
Current set 19: df8 -
|
||||
L1 HIT
|
||||
Count_Block Update
|
||||
Changed set 19: df8 -
|
||||
# 51 : Read df84e5
|
||||
L1 Read: df84e5(tag df8, index 19)
|
||||
Current set 19: df8 -
|
||||
L1 HIT
|
||||
Count_Block Update
|
||||
Changed set 19: df8 -
|
||||
# 52 : Read df84e6
|
||||
L1 Read: df84e6(tag df8, index 19)
|
||||
Current set 19: df8 -
|
||||
L1 HIT
|
||||
Count_Block Update
|
||||
Changed set 19: df8 -
|
||||
# 53 : Read df84e7
|
||||
L1 Read: df84e7(tag df8, index 19)
|
||||
Current set 19: df8 -
|
||||
L1 HIT
|
||||
Count_Block Update
|
||||
Changed set 19: df8 -
|
||||
# 54 : Read df84e8
|
||||
L1 Read: df84e8(tag df8, index 19)
|
||||
Current set 19: df8 -
|
||||
L1 HIT
|
||||
Count_Block Update
|
||||
Changed set 19: df8 -
|
||||
# 55 : Read df84e9
|
||||
L1 Read: df84e9(tag df8, index 19)
|
||||
Current set 19: df8 -
|
||||
L1 HIT
|
||||
Count_Block Update
|
||||
Changed set 19: df8 -
|
||||
# 56 : Read df84ea
|
||||
L1 Read: df84ea(tag df8, index 19)
|
||||
Current set 19: df8 -
|
||||
L1 HIT
|
||||
Count_Block Update
|
||||
Changed set 19: df8 -
|
||||
# 57 : Read df84eb
|
||||
L1 Read: df84eb(tag df8, index 19)
|
||||
Current set 19: df8 -
|
||||
L1 HIT
|
||||
Count_Block Update
|
||||
Changed set 19: df8 -
|
||||
# 58 : Read df84ec
|
||||
L1 Read: df84ec(tag df8, index 19)
|
||||
Current set 19: df8 -
|
||||
L1 HIT
|
||||
Count_Block Update
|
||||
Changed set 19: df8 -
|
||||
# 59 : Read df84ed
|
||||
L1 Read: df84ed(tag df8, index 19)
|
||||
Current set 19: df8 -
|
||||
L1 HIT
|
||||
Count_Block Update
|
||||
Changed set 19: df8 -
|
||||
# 60 : Read df84ee
|
||||
L1 Read: df84ee(tag df8, index 19)
|
||||
Current set 19: df8 -
|
||||
L1 HIT
|
||||
Count_Block Update
|
||||
Changed set 19: df8 -
|
||||
# 61 : Read df84ef
|
||||
L1 Read: df84ef(tag df8, index 19)
|
||||
Current set 19: df8 -
|
||||
L1 HIT
|
||||
Count_Block Update
|
||||
Changed set 19: df8 -
|
||||
# 62 : Read df84f0
|
||||
L1 Read: df84f0(tag df8, index 19)
|
||||
Current set 19: df8 -
|
||||
L1 HIT
|
||||
Count_Block Update
|
||||
Changed set 19: df8 -
|
||||
# 63 : Read df84f1
|
||||
L1 Read: df84f1(tag df8, index 19)
|
||||
Current set 19: df8 -
|
||||
L1 HIT
|
||||
Count_Block Update
|
||||
Changed set 19: df8 -
|
||||
# 64 : Read df84f2
|
||||
L1 Read: df84f2(tag df8, index 19)
|
||||
Current set 19: df8 -
|
||||
L1 HIT
|
||||
Count_Block Update
|
||||
Changed set 19: df8 -
|
||||
# 65 : Read df84f3
|
||||
L1 Read: df84f3(tag df8, index 19)
|
||||
Current set 19: df8 -
|
||||
L1 HIT
|
||||
Count_Block Update
|
||||
Changed set 19: df8 -
|
||||
# 66 : Read df84f4
|
||||
L1 Read: df84f4(tag df8, index 19)
|
||||
Current set 19: df8 -
|
||||
L1 HIT
|
||||
Count_Block Update
|
||||
Changed set 19: df8 -
|
||||
# 67 : Read df84f5
|
||||
L1 Read: df84f5(tag df8, index 19)
|
||||
Current set 19: df8 -
|
||||
L1 HIT
|
||||
Count_Block Update
|
||||
Changed set 19: df8 -
|
||||
# 68 : Read 40138938
|
||||
L1 Read: 40138938(tag 40138, index 36)
|
||||
Current set 36: 40138 D -
|
||||
L1 HIT
|
||||
Count_Block Update
|
||||
Changed set 36: 40138 D -
|
||||
# 69 : Read 423aeb90
|
||||
L1 Read: 423aeb90(tag 423ae, index 46)
|
||||
Current set 46: 423ae -
|
||||
L1 HIT
|
||||
Count_Block Update
|
||||
Changed set 46: 423ae -
|
||||
# 70 : Write 7b034d58
|
||||
L1 Write: 7b034d58(tag 7b034, index 53)
|
||||
Current set 53: - -
|
||||
L1 MISS
|
||||
Count_Block Update
|
||||
L1 SET DIRTY
|
||||
Changed set 53: 7b034 D -
|
||||
# 71 : Write 7b034c80
|
||||
L1 Write: 7b034c80(tag 7b034, index 50)
|
||||
Current set 50: - -
|
||||
L1 MISS
|
||||
Count_Block Update
|
||||
L1 SET DIRTY
|
||||
Changed set 50: 7b034 D -
|
||||
# 72 : Read 7b034c68
|
||||
L1 Read: 7b034c68(tag 7b034, index 49)
|
||||
Current set 49: df7 7b034 D
|
||||
L1 HIT
|
||||
Count_Block Update
|
||||
Changed set 49: df7 7b034 D
|
||||
# 73 : Read df84d4
|
||||
L1 Read: df84d4(tag df8, index 19)
|
||||
Current set 19: df8 -
|
||||
L1 HIT
|
||||
Count_Block Update
|
||||
Changed set 19: df8 -
|
||||
# 74 : Read 40138938
|
||||
L1 Read: 40138938(tag 40138, index 36)
|
||||
Current set 36: 40138 D -
|
||||
L1 HIT
|
||||
Count_Block Update
|
||||
Changed set 36: 40138 D -
|
||||
# 75 : Read 40139dd0
|
||||
L1 Read: 40139dd0(tag 40139, index 55)
|
||||
Current set 55: 7b034 D 40139 D
|
||||
L1 HIT
|
||||
Count_Block Update
|
||||
Changed set 55: 7b034 D 40139 D
|
||||
# 76 : Read 423aeb92
|
||||
L1 Read: 423aeb92(tag 423ae, index 46)
|
||||
Current set 46: 423ae -
|
||||
L1 HIT
|
||||
Count_Block Update
|
||||
Changed set 46: 423ae -
|
||||
# 77 : Read 423aeb94
|
||||
L1 Read: 423aeb94(tag 423ae, index 46)
|
||||
Current set 46: 423ae -
|
||||
L1 HIT
|
||||
Count_Block Update
|
||||
Changed set 46: 423ae -
|
||||
# 78 : Read 423aeb88
|
||||
L1 Read: 423aeb88(tag 423ae, index 46)
|
||||
Current set 46: 423ae -
|
||||
L1 HIT
|
||||
Count_Block Update
|
||||
Changed set 46: 423ae -
|
||||
# 79 : Read 423aeb88
|
||||
L1 Read: 423aeb88(tag 423ae, index 46)
|
||||
Current set 46: 423ae -
|
||||
L1 HIT
|
||||
Count_Block Update
|
||||
Changed set 46: 423ae -
|
||||
# 80 : Read 423aeb88
|
||||
L1 Read: 423aeb88(tag 423ae, index 46)
|
||||
Current set 46: 423ae -
|
||||
L1 HIT
|
||||
Count_Block Update
|
||||
Changed set 46: 423ae -
|
||||
# 81 : Read 423aeb88
|
||||
L1 Read: 423aeb88(tag 423ae, index 46)
|
||||
Current set 46: 423ae -
|
||||
L1 HIT
|
||||
Count_Block Update
|
||||
Changed set 46: 423ae -
|
||||
# 82 : Read 423aeb8c
|
||||
L1 Read: 423aeb8c(tag 423ae, index 46)
|
||||
Current set 46: 423ae -
|
||||
L1 HIT
|
||||
Count_Block Update
|
||||
Changed set 46: 423ae -
|
||||
# 83 : Read 42351e38
|
||||
L1 Read: 42351e38(tag 42351, index 56)
|
||||
Current set 56: - -
|
||||
L1 MISS
|
||||
Count_Block Update
|
||||
Changed set 56: 42351 -
|
||||
# 84 : Read 42351e3c
|
||||
L1 Read: 42351e3c(tag 42351, index 56)
|
||||
Current set 56: 42351 -
|
||||
L1 HIT
|
||||
Count_Block Update
|
||||
Changed set 56: 42351 -
|
||||
# 85 : Read 423aeb88
|
||||
L1 Read: 423aeb88(tag 423ae, index 46)
|
||||
Current set 46: 423ae -
|
||||
L1 HIT
|
||||
Count_Block Update
|
||||
Changed set 46: 423ae -
|
||||
# 86 : Write 40022e80
|
||||
L1 Write: 40022e80(tag 40022, index 58)
|
||||
Current set 58: - -
|
||||
L1 MISS
|
||||
Count_Block Update
|
||||
L1 SET DIRTY
|
||||
Changed set 58: 40022 D -
|
||||
# 87 : Read 423aeb88
|
||||
L1 Read: 423aeb88(tag 423ae, index 46)
|
||||
Current set 46: 423ae -
|
||||
L1 HIT
|
||||
Count_Block Update
|
||||
Changed set 46: 423ae -
|
||||
# 88 : Read 4214c9d4
|
||||
L1 Read: 4214c9d4(tag 4214c, index 39)
|
||||
Current set 39: - -
|
||||
L1 MISS
|
||||
Count_Block Update
|
||||
Changed set 39: 4214c -
|
||||
# 89 : Read 40002178
|
||||
L1 Read: 40002178(tag 40002, index 5)
|
||||
Current set 5: - -
|
||||
L1 MISS
|
||||
Count_Block Update
|
||||
Changed set 5: 40002 -
|
||||
# 90 : Read 384130
|
||||
L1 Read: 384130(tag 384, index 4)
|
||||
Current set 4: - -
|
||||
L1 MISS
|
||||
Count_Block Update
|
||||
Changed set 4: 384 -
|
||||
# 91 : Read 423aeb8c
|
||||
L1 Read: 423aeb8c(tag 423ae, index 46)
|
||||
Current set 46: 423ae -
|
||||
L1 HIT
|
||||
Count_Block Update
|
||||
Changed set 46: 423ae -
|
||||
# 92 : Read 42351e38
|
||||
L1 Read: 42351e38(tag 42351, index 56)
|
||||
Current set 56: 42351 -
|
||||
L1 HIT
|
||||
Count_Block Update
|
||||
Changed set 56: 42351 -
|
||||
# 93 : Read 42351e3c
|
||||
L1 Read: 42351e3c(tag 42351, index 56)
|
||||
Current set 56: 42351 -
|
||||
L1 HIT
|
||||
Count_Block Update
|
||||
Changed set 56: 42351 -
|
||||
# 94 : Read 401367d0
|
||||
L1 Read: 401367d0(tag 40136, index 31)
|
||||
Current set 31: - -
|
||||
L1 MISS
|
||||
Count_Block Update
|
||||
Changed set 31: 40136 -
|
||||
# 95 : Read 7b0345e4
|
||||
L1 Read: 7b0345e4(tag 7b034, index 23)
|
||||
Current set 23: - -
|
||||
L1 MISS
|
||||
Count_Block Update
|
||||
Changed set 23: 7b034 -
|
||||
# 96 : Write 423aeb8c
|
||||
L1 Write: 423aeb8c(tag 423ae, index 46)
|
||||
Current set 46: 423ae -
|
||||
L1 HIT
|
||||
Count_Block Update
|
||||
L1 SET DIRTY
|
||||
Changed set 46: 423ae D -
|
||||
# 97 : Write 423aeb94
|
||||
L1 Write: 423aeb94(tag 423ae, index 46)
|
||||
Current set 46: 423ae D -
|
||||
L1 HIT
|
||||
Count_Block Update
|
||||
L1 SET DIRTY
|
||||
Changed set 46: 423ae D -
|
||||
# 98 : Read 40022e80
|
||||
L1 Read: 40022e80(tag 40022, index 58)
|
||||
Current set 58: 40022 D -
|
||||
L1 HIT
|
||||
Count_Block Update
|
||||
Changed set 58: 40022 D -
|
||||
# 99 : Read 40139dd0
|
||||
L1 Read: 40139dd0(tag 40139, index 55)
|
||||
Current set 55: 7b034 D 40139 D
|
||||
L1 HIT
|
||||
Count_Block Update
|
||||
Changed set 55: 7b034 D 40139 D
|
||||
# 100 : Read 423aeb9c
|
||||
L1 Read: 423aeb9c(tag 423ae, index 46)
|
||||
Current set 46: 423ae D -
|
||||
L1 HIT
|
||||
Count_Block Update
|
||||
Changed set 46: 423ae D -
|
||||
|
|
@ -0,0 +1,555 @@
|
|||
# 1 : Read 40012998
|
||||
L1 Read: 40012998(tag 400129, index 4)
|
||||
Current set 4: - - - -
|
||||
L1 MISS
|
||||
Count_Block Update
|
||||
Changed set 4: 400129 - - -
|
||||
# 2 : Read 40012988
|
||||
L1 Read: 40012988(tag 400129, index 4)
|
||||
Current set 4: 400129 - - -
|
||||
L1 HIT
|
||||
Count_Block Update
|
||||
Changed set 4: 400129 - - -
|
||||
# 3 : Read 4008b390
|
||||
L1 Read: 4008b390(tag 4008b3, index 4)
|
||||
Current set 4: 400129 - - -
|
||||
L1 MISS
|
||||
Count_Block Update
|
||||
Changed set 4: 400129 4008b3 - -
|
||||
# 4 : Write 4002e84c
|
||||
L1 Write: 4002e84c(tag 4002e8, index 2)
|
||||
Current set 2: - - - -
|
||||
L1 MISS, WRITE THROUGH
|
||||
Changed set 2: - - - -
|
||||
# 5 : Write 4002e850
|
||||
L1 Write: 4002e850(tag 4002e8, index 2)
|
||||
Current set 2: - - - -
|
||||
L1 MISS, WRITE THROUGH
|
||||
Changed set 2: - - - -
|
||||
# 6 : Read 40012988
|
||||
L1 Read: 40012988(tag 400129, index 4)
|
||||
Current set 4: 400129 4008b3 - -
|
||||
L1 HIT
|
||||
Count_Block Update
|
||||
Changed set 4: 400129 4008b3 - -
|
||||
# 7 : Write 4003c200
|
||||
L1 Write: 4003c200(tag 4003c2, index 0)
|
||||
Current set 0: - - - -
|
||||
L1 MISS, WRITE THROUGH
|
||||
Changed set 0: - - - -
|
||||
# 8 : Read 40012988
|
||||
L1 Read: 40012988(tag 400129, index 4)
|
||||
Current set 4: 400129 4008b3 - -
|
||||
L1 HIT
|
||||
Count_Block Update
|
||||
Changed set 4: 400129 4008b3 - -
|
||||
# 9 : Write 40049600
|
||||
L1 Write: 40049600(tag 400496, index 0)
|
||||
Current set 0: - - - -
|
||||
L1 MISS, WRITE THROUGH
|
||||
Changed set 0: - - - -
|
||||
# 10 : Read 40012a00
|
||||
L1 Read: 40012a00(tag 40012a, index 0)
|
||||
Current set 0: - - - -
|
||||
L1 MISS
|
||||
Count_Block Update
|
||||
Changed set 0: 40012a - - -
|
||||
# 11 : Read 4001298c
|
||||
L1 Read: 4001298c(tag 400129, index 4)
|
||||
Current set 4: 400129 4008b3 - -
|
||||
L1 HIT
|
||||
Count_Block Update
|
||||
Changed set 4: 400129 4008b3 - -
|
||||
# 12 : Read 4008b390
|
||||
L1 Read: 4008b390(tag 4008b3, index 4)
|
||||
Current set 4: 400129 4008b3 - -
|
||||
L1 HIT
|
||||
Count_Block Update
|
||||
Changed set 4: 400129 4008b3 - -
|
||||
# 13 : Write 4002e84c
|
||||
L1 Write: 4002e84c(tag 4002e8, index 2)
|
||||
Current set 2: - - - -
|
||||
L1 MISS, WRITE THROUGH
|
||||
Changed set 2: - - - -
|
||||
# 14 : Write 4002e850
|
||||
L1 Write: 4002e850(tag 4002e8, index 2)
|
||||
Current set 2: - - - -
|
||||
L1 MISS, WRITE THROUGH
|
||||
Changed set 2: - - - -
|
||||
# 15 : Read 4001298c
|
||||
L1 Read: 4001298c(tag 400129, index 4)
|
||||
Current set 4: 400129 4008b3 - -
|
||||
L1 HIT
|
||||
Count_Block Update
|
||||
Changed set 4: 400129 4008b3 - -
|
||||
# 16 : Write 4003c204
|
||||
L1 Write: 4003c204(tag 4003c2, index 0)
|
||||
Current set 0: 40012a - - -
|
||||
L1 MISS, WRITE THROUGH
|
||||
Changed set 0: 40012a - - -
|
||||
# 17 : Read 4001298c
|
||||
L1 Read: 4001298c(tag 400129, index 4)
|
||||
Current set 4: 400129 4008b3 - -
|
||||
L1 HIT
|
||||
Count_Block Update
|
||||
Changed set 4: 400129 4008b3 - -
|
||||
# 18 : Write 40049604
|
||||
L1 Write: 40049604(tag 400496, index 0)
|
||||
Current set 0: 40012a - - -
|
||||
L1 MISS, WRITE THROUGH
|
||||
Changed set 0: 40012a - - -
|
||||
# 19 : Read 40012a04
|
||||
L1 Read: 40012a04(tag 40012a, index 0)
|
||||
Current set 0: 40012a - - -
|
||||
L1 HIT
|
||||
Count_Block Update
|
||||
Changed set 0: 40012a - - -
|
||||
# 20 : Read 40012990
|
||||
L1 Read: 40012990(tag 400129, index 4)
|
||||
Current set 4: 400129 4008b3 - -
|
||||
L1 HIT
|
||||
Count_Block Update
|
||||
Changed set 4: 400129 4008b3 - -
|
||||
# 21 : Read 4008b390
|
||||
L1 Read: 4008b390(tag 4008b3, index 4)
|
||||
Current set 4: 400129 4008b3 - -
|
||||
L1 HIT
|
||||
Count_Block Update
|
||||
Changed set 4: 400129 4008b3 - -
|
||||
# 22 : Write 4002e84c
|
||||
L1 Write: 4002e84c(tag 4002e8, index 2)
|
||||
Current set 2: - - - -
|
||||
L1 MISS, WRITE THROUGH
|
||||
Changed set 2: - - - -
|
||||
# 23 : Write 4002e850
|
||||
L1 Write: 4002e850(tag 4002e8, index 2)
|
||||
Current set 2: - - - -
|
||||
L1 MISS, WRITE THROUGH
|
||||
Changed set 2: - - - -
|
||||
# 24 : Read 40012990
|
||||
L1 Read: 40012990(tag 400129, index 4)
|
||||
Current set 4: 400129 4008b3 - -
|
||||
L1 HIT
|
||||
Count_Block Update
|
||||
Changed set 4: 400129 4008b3 - -
|
||||
# 25 : Write 4003c208
|
||||
L1 Write: 4003c208(tag 4003c2, index 0)
|
||||
Current set 0: 40012a - - -
|
||||
L1 MISS, WRITE THROUGH
|
||||
Changed set 0: 40012a - - -
|
||||
# 26 : Read 40012990
|
||||
L1 Read: 40012990(tag 400129, index 4)
|
||||
Current set 4: 400129 4008b3 - -
|
||||
L1 HIT
|
||||
Count_Block Update
|
||||
Changed set 4: 400129 4008b3 - -
|
||||
# 27 : Write 40049608
|
||||
L1 Write: 40049608(tag 400496, index 0)
|
||||
Current set 0: 40012a - - -
|
||||
L1 MISS, WRITE THROUGH
|
||||
Changed set 0: 40012a - - -
|
||||
# 28 : Read 40012a08
|
||||
L1 Read: 40012a08(tag 40012a, index 0)
|
||||
Current set 0: 40012a - - -
|
||||
L1 HIT
|
||||
Count_Block Update
|
||||
Changed set 0: 40012a - - -
|
||||
# 29 : Write 4002e864
|
||||
L1 Write: 4002e864(tag 4002e8, index 3)
|
||||
Current set 3: - - - -
|
||||
L1 MISS, WRITE THROUGH
|
||||
Changed set 3: - - - -
|
||||
# 30 : Read 40012994
|
||||
L1 Read: 40012994(tag 400129, index 4)
|
||||
Current set 4: 400129 4008b3 - -
|
||||
L1 HIT
|
||||
Count_Block Update
|
||||
Changed set 4: 400129 4008b3 - -
|
||||
# 31 : Read 4008b390
|
||||
L1 Read: 4008b390(tag 4008b3, index 4)
|
||||
Current set 4: 400129 4008b3 - -
|
||||
L1 HIT
|
||||
Count_Block Update
|
||||
Changed set 4: 400129 4008b3 - -
|
||||
# 32 : Write 4002e84c
|
||||
L1 Write: 4002e84c(tag 4002e8, index 2)
|
||||
Current set 2: - - - -
|
||||
L1 MISS, WRITE THROUGH
|
||||
Changed set 2: - - - -
|
||||
# 33 : Write 4002e850
|
||||
L1 Write: 4002e850(tag 4002e8, index 2)
|
||||
Current set 2: - - - -
|
||||
L1 MISS, WRITE THROUGH
|
||||
Changed set 2: - - - -
|
||||
# 34 : Read 40012994
|
||||
L1 Read: 40012994(tag 400129, index 4)
|
||||
Current set 4: 400129 4008b3 - -
|
||||
L1 HIT
|
||||
Count_Block Update
|
||||
Changed set 4: 400129 4008b3 - -
|
||||
# 35 : Write 4003c20c
|
||||
L1 Write: 4003c20c(tag 4003c2, index 0)
|
||||
Current set 0: 40012a - - -
|
||||
L1 MISS, WRITE THROUGH
|
||||
Changed set 0: 40012a - - -
|
||||
# 36 : Read 40012994
|
||||
L1 Read: 40012994(tag 400129, index 4)
|
||||
Current set 4: 400129 4008b3 - -
|
||||
L1 HIT
|
||||
Count_Block Update
|
||||
Changed set 4: 400129 4008b3 - -
|
||||
# 37 : Write 4004960c
|
||||
L1 Write: 4004960c(tag 400496, index 0)
|
||||
Current set 0: 40012a - - -
|
||||
L1 MISS, WRITE THROUGH
|
||||
Changed set 0: 40012a - - -
|
||||
# 38 : Read 40012a0c
|
||||
L1 Read: 40012a0c(tag 40012a, index 0)
|
||||
Current set 0: 40012a - - -
|
||||
L1 HIT
|
||||
Count_Block Update
|
||||
Changed set 0: 40012a - - -
|
||||
# 39 : Read 40012998
|
||||
L1 Read: 40012998(tag 400129, index 4)
|
||||
Current set 4: 400129 4008b3 - -
|
||||
L1 HIT
|
||||
Count_Block Update
|
||||
Changed set 4: 400129 4008b3 - -
|
||||
# 40 : Read 4008b390
|
||||
L1 Read: 4008b390(tag 4008b3, index 4)
|
||||
Current set 4: 400129 4008b3 - -
|
||||
L1 HIT
|
||||
Count_Block Update
|
||||
Changed set 4: 400129 4008b3 - -
|
||||
# 41 : Write 4002e84c
|
||||
L1 Write: 4002e84c(tag 4002e8, index 2)
|
||||
Current set 2: - - - -
|
||||
L1 MISS, WRITE THROUGH
|
||||
Changed set 2: - - - -
|
||||
# 42 : Write 4002e850
|
||||
L1 Write: 4002e850(tag 4002e8, index 2)
|
||||
Current set 2: - - - -
|
||||
L1 MISS, WRITE THROUGH
|
||||
Changed set 2: - - - -
|
||||
# 43 : Read 40012998
|
||||
L1 Read: 40012998(tag 400129, index 4)
|
||||
Current set 4: 400129 4008b3 - -
|
||||
L1 HIT
|
||||
Count_Block Update
|
||||
Changed set 4: 400129 4008b3 - -
|
||||
# 44 : Write 4003c210
|
||||
L1 Write: 4003c210(tag 4003c2, index 0)
|
||||
Current set 0: 40012a - - -
|
||||
L1 MISS, WRITE THROUGH
|
||||
Changed set 0: 40012a - - -
|
||||
# 45 : Read 40012998
|
||||
L1 Read: 40012998(tag 400129, index 4)
|
||||
Current set 4: 400129 4008b3 - -
|
||||
L1 HIT
|
||||
Count_Block Update
|
||||
Changed set 4: 400129 4008b3 - -
|
||||
# 46 : Write 40049610
|
||||
L1 Write: 40049610(tag 400496, index 0)
|
||||
Current set 0: 40012a - - -
|
||||
L1 MISS, WRITE THROUGH
|
||||
Changed set 0: 40012a - - -
|
||||
# 47 : Read 40012a10
|
||||
L1 Read: 40012a10(tag 40012a, index 0)
|
||||
Current set 0: 40012a - - -
|
||||
L1 HIT
|
||||
Count_Block Update
|
||||
Changed set 0: 40012a - - -
|
||||
# 48 : Read 4001299c
|
||||
L1 Read: 4001299c(tag 400129, index 4)
|
||||
Current set 4: 400129 4008b3 - -
|
||||
L1 HIT
|
||||
Count_Block Update
|
||||
Changed set 4: 400129 4008b3 - -
|
||||
# 49 : Read 4008b390
|
||||
L1 Read: 4008b390(tag 4008b3, index 4)
|
||||
Current set 4: 400129 4008b3 - -
|
||||
L1 HIT
|
||||
Count_Block Update
|
||||
Changed set 4: 400129 4008b3 - -
|
||||
# 50 : Write 4002e84c
|
||||
L1 Write: 4002e84c(tag 4002e8, index 2)
|
||||
Current set 2: - - - -
|
||||
L1 MISS, WRITE THROUGH
|
||||
Changed set 2: - - - -
|
||||
# 51 : Write 4002e850
|
||||
L1 Write: 4002e850(tag 4002e8, index 2)
|
||||
Current set 2: - - - -
|
||||
L1 MISS, WRITE THROUGH
|
||||
Changed set 2: - - - -
|
||||
# 52 : Read 4001299c
|
||||
L1 Read: 4001299c(tag 400129, index 4)
|
||||
Current set 4: 400129 4008b3 - -
|
||||
L1 HIT
|
||||
Count_Block Update
|
||||
Changed set 4: 400129 4008b3 - -
|
||||
# 53 : Write 4003c214
|
||||
L1 Write: 4003c214(tag 4003c2, index 0)
|
||||
Current set 0: 40012a - - -
|
||||
L1 MISS, WRITE THROUGH
|
||||
Changed set 0: 40012a - - -
|
||||
# 54 : Read 4001299c
|
||||
L1 Read: 4001299c(tag 400129, index 4)
|
||||
Current set 4: 400129 4008b3 - -
|
||||
L1 HIT
|
||||
Count_Block Update
|
||||
Changed set 4: 400129 4008b3 - -
|
||||
# 55 : Write 40049614
|
||||
L1 Write: 40049614(tag 400496, index 0)
|
||||
Current set 0: 40012a - - -
|
||||
L1 MISS, WRITE THROUGH
|
||||
Changed set 0: 40012a - - -
|
||||
# 56 : Read 40012a14
|
||||
L1 Read: 40012a14(tag 40012a, index 0)
|
||||
Current set 0: 40012a - - -
|
||||
L1 HIT
|
||||
Count_Block Update
|
||||
Changed set 0: 40012a - - -
|
||||
# 57 : Write 4002e868
|
||||
L1 Write: 4002e868(tag 4002e8, index 3)
|
||||
Current set 3: - - - -
|
||||
L1 MISS, WRITE THROUGH
|
||||
Changed set 3: - - - -
|
||||
# 58 : Read 400129a0
|
||||
L1 Read: 400129a0(tag 400129, index 5)
|
||||
Current set 5: - - - -
|
||||
L1 MISS
|
||||
Count_Block Update
|
||||
Changed set 5: 400129 - - -
|
||||
# 59 : Read 4008b390
|
||||
L1 Read: 4008b390(tag 4008b3, index 4)
|
||||
Current set 4: 400129 4008b3 - -
|
||||
L1 HIT
|
||||
Count_Block Update
|
||||
Changed set 4: 400129 4008b3 - -
|
||||
# 60 : Write 4002e84c
|
||||
L1 Write: 4002e84c(tag 4002e8, index 2)
|
||||
Current set 2: - - - -
|
||||
L1 MISS, WRITE THROUGH
|
||||
Changed set 2: - - - -
|
||||
# 61 : Write 4002e850
|
||||
L1 Write: 4002e850(tag 4002e8, index 2)
|
||||
Current set 2: - - - -
|
||||
L1 MISS, WRITE THROUGH
|
||||
Changed set 2: - - - -
|
||||
# 62 : Read 400129a0
|
||||
L1 Read: 400129a0(tag 400129, index 5)
|
||||
Current set 5: 400129 - - -
|
||||
L1 HIT
|
||||
Count_Block Update
|
||||
Changed set 5: 400129 - - -
|
||||
# 63 : Write 4003c218
|
||||
L1 Write: 4003c218(tag 4003c2, index 0)
|
||||
Current set 0: 40012a - - -
|
||||
L1 MISS, WRITE THROUGH
|
||||
Changed set 0: 40012a - - -
|
||||
# 64 : Read 400129a0
|
||||
L1 Read: 400129a0(tag 400129, index 5)
|
||||
Current set 5: 400129 - - -
|
||||
L1 HIT
|
||||
Count_Block Update
|
||||
Changed set 5: 400129 - - -
|
||||
# 65 : Write 40049618
|
||||
L1 Write: 40049618(tag 400496, index 0)
|
||||
Current set 0: 40012a - - -
|
||||
L1 MISS, WRITE THROUGH
|
||||
Changed set 0: 40012a - - -
|
||||
# 66 : Read 40012a18
|
||||
L1 Read: 40012a18(tag 40012a, index 0)
|
||||
Current set 0: 40012a - - -
|
||||
L1 HIT
|
||||
Count_Block Update
|
||||
Changed set 0: 40012a - - -
|
||||
# 67 : Read 400129a4
|
||||
L1 Read: 400129a4(tag 400129, index 5)
|
||||
Current set 5: 400129 - - -
|
||||
L1 HIT
|
||||
Count_Block Update
|
||||
Changed set 5: 400129 - - -
|
||||
# 68 : Read 4008b390
|
||||
L1 Read: 4008b390(tag 4008b3, index 4)
|
||||
Current set 4: 400129 4008b3 - -
|
||||
L1 HIT
|
||||
Count_Block Update
|
||||
Changed set 4: 400129 4008b3 - -
|
||||
# 69 : Write 4002e84c
|
||||
L1 Write: 4002e84c(tag 4002e8, index 2)
|
||||
Current set 2: - - - -
|
||||
L1 MISS, WRITE THROUGH
|
||||
Changed set 2: - - - -
|
||||
# 70 : Write 4002e850
|
||||
L1 Write: 4002e850(tag 4002e8, index 2)
|
||||
Current set 2: - - - -
|
||||
L1 MISS, WRITE THROUGH
|
||||
Changed set 2: - - - -
|
||||
# 71 : Read 400129a4
|
||||
L1 Read: 400129a4(tag 400129, index 5)
|
||||
Current set 5: 400129 - - -
|
||||
L1 HIT
|
||||
Count_Block Update
|
||||
Changed set 5: 400129 - - -
|
||||
# 72 : Write 4003c21c
|
||||
L1 Write: 4003c21c(tag 4003c2, index 0)
|
||||
Current set 0: 40012a - - -
|
||||
L1 MISS, WRITE THROUGH
|
||||
Changed set 0: 40012a - - -
|
||||
# 73 : Read 400129a4
|
||||
L1 Read: 400129a4(tag 400129, index 5)
|
||||
Current set 5: 400129 - - -
|
||||
L1 HIT
|
||||
Count_Block Update
|
||||
Changed set 5: 400129 - - -
|
||||
# 74 : Write 4004961c
|
||||
L1 Write: 4004961c(tag 400496, index 0)
|
||||
Current set 0: 40012a - - -
|
||||
L1 MISS, WRITE THROUGH
|
||||
Changed set 0: 40012a - - -
|
||||
# 75 : Read 40012a1c
|
||||
L1 Read: 40012a1c(tag 40012a, index 0)
|
||||
Current set 0: 40012a - - -
|
||||
L1 HIT
|
||||
Count_Block Update
|
||||
Changed set 0: 40012a - - -
|
||||
# 76 : Read 400129a8
|
||||
L1 Read: 400129a8(tag 400129, index 5)
|
||||
Current set 5: 400129 - - -
|
||||
L1 HIT
|
||||
Count_Block Update
|
||||
Changed set 5: 400129 - - -
|
||||
# 77 : Read 4008b390
|
||||
L1 Read: 4008b390(tag 4008b3, index 4)
|
||||
Current set 4: 400129 4008b3 - -
|
||||
L1 HIT
|
||||
Count_Block Update
|
||||
Changed set 4: 400129 4008b3 - -
|
||||
# 78 : Write 4002e84c
|
||||
L1 Write: 4002e84c(tag 4002e8, index 2)
|
||||
Current set 2: - - - -
|
||||
L1 MISS, WRITE THROUGH
|
||||
Changed set 2: - - - -
|
||||
# 79 : Write 4002e850
|
||||
L1 Write: 4002e850(tag 4002e8, index 2)
|
||||
Current set 2: - - - -
|
||||
L1 MISS, WRITE THROUGH
|
||||
Changed set 2: - - - -
|
||||
# 80 : Read 400129a8
|
||||
L1 Read: 400129a8(tag 400129, index 5)
|
||||
Current set 5: 400129 - - -
|
||||
L1 HIT
|
||||
Count_Block Update
|
||||
Changed set 5: 400129 - - -
|
||||
# 81 : Write 4003c220
|
||||
L1 Write: 4003c220(tag 4003c2, index 1)
|
||||
Current set 1: - - - -
|
||||
L1 MISS, WRITE THROUGH
|
||||
Changed set 1: - - - -
|
||||
# 82 : Read 400129a8
|
||||
L1 Read: 400129a8(tag 400129, index 5)
|
||||
Current set 5: 400129 - - -
|
||||
L1 HIT
|
||||
Count_Block Update
|
||||
Changed set 5: 400129 - - -
|
||||
# 83 : Write 40049620
|
||||
L1 Write: 40049620(tag 400496, index 1)
|
||||
Current set 1: - - - -
|
||||
L1 MISS, WRITE THROUGH
|
||||
Changed set 1: - - - -
|
||||
# 84 : Read 40012a20
|
||||
L1 Read: 40012a20(tag 40012a, index 1)
|
||||
Current set 1: - - - -
|
||||
L1 MISS
|
||||
Count_Block Update
|
||||
Changed set 1: 40012a - - -
|
||||
# 85 : Read 400129ac
|
||||
L1 Read: 400129ac(tag 400129, index 5)
|
||||
Current set 5: 400129 - - -
|
||||
L1 HIT
|
||||
Count_Block Update
|
||||
Changed set 5: 400129 - - -
|
||||
# 86 : Read 4008b390
|
||||
L1 Read: 4008b390(tag 4008b3, index 4)
|
||||
Current set 4: 400129 4008b3 - -
|
||||
L1 HIT
|
||||
Count_Block Update
|
||||
Changed set 4: 400129 4008b3 - -
|
||||
# 87 : Write 4002e84c
|
||||
L1 Write: 4002e84c(tag 4002e8, index 2)
|
||||
Current set 2: - - - -
|
||||
L1 MISS, WRITE THROUGH
|
||||
Changed set 2: - - - -
|
||||
# 88 : Write 4002e850
|
||||
L1 Write: 4002e850(tag 4002e8, index 2)
|
||||
Current set 2: - - - -
|
||||
L1 MISS, WRITE THROUGH
|
||||
Changed set 2: - - - -
|
||||
# 89 : Read 400129ac
|
||||
L1 Read: 400129ac(tag 400129, index 5)
|
||||
Current set 5: 400129 - - -
|
||||
L1 HIT
|
||||
Count_Block Update
|
||||
Changed set 5: 400129 - - -
|
||||
# 90 : Write 4003c224
|
||||
L1 Write: 4003c224(tag 4003c2, index 1)
|
||||
Current set 1: 40012a - - -
|
||||
L1 MISS, WRITE THROUGH
|
||||
Changed set 1: 40012a - - -
|
||||
# 91 : Read 400129ac
|
||||
L1 Read: 400129ac(tag 400129, index 5)
|
||||
Current set 5: 400129 - - -
|
||||
L1 HIT
|
||||
Count_Block Update
|
||||
Changed set 5: 400129 - - -
|
||||
# 92 : Write 40049624
|
||||
L1 Write: 40049624(tag 400496, index 1)
|
||||
Current set 1: 40012a - - -
|
||||
L1 MISS, WRITE THROUGH
|
||||
Changed set 1: 40012a - - -
|
||||
# 93 : Read 40012a24
|
||||
L1 Read: 40012a24(tag 40012a, index 1)
|
||||
Current set 1: 40012a - - -
|
||||
L1 HIT
|
||||
Count_Block Update
|
||||
Changed set 1: 40012a - - -
|
||||
# 94 : Read 400129b0
|
||||
L1 Read: 400129b0(tag 400129, index 5)
|
||||
Current set 5: 400129 - - -
|
||||
L1 HIT
|
||||
Count_Block Update
|
||||
Changed set 5: 400129 - - -
|
||||
# 95 : Read 4008b390
|
||||
L1 Read: 4008b390(tag 4008b3, index 4)
|
||||
Current set 4: 400129 4008b3 - -
|
||||
L1 HIT
|
||||
Count_Block Update
|
||||
Changed set 4: 400129 4008b3 - -
|
||||
# 96 : Write 4002e84c
|
||||
L1 Write: 4002e84c(tag 4002e8, index 2)
|
||||
Current set 2: - - - -
|
||||
L1 MISS, WRITE THROUGH
|
||||
Changed set 2: - - - -
|
||||
# 97 : Write 4002e850
|
||||
L1 Write: 4002e850(tag 4002e8, index 2)
|
||||
Current set 2: - - - -
|
||||
L1 MISS, WRITE THROUGH
|
||||
Changed set 2: - - - -
|
||||
# 98 : Read 400129b0
|
||||
L1 Read: 400129b0(tag 400129, index 5)
|
||||
Current set 5: 400129 - - -
|
||||
L1 HIT
|
||||
Count_Block Update
|
||||
Changed set 5: 400129 - - -
|
||||
# 99 : Write 4003c228
|
||||
L1 Write: 4003c228(tag 4003c2, index 1)
|
||||
Current set 1: 40012a - - -
|
||||
L1 MISS, WRITE THROUGH
|
||||
Changed set 1: 40012a - - -
|
||||
# 100 : Read 400129b0
|
||||
L1 Read: 400129b0(tag 400129, index 5)
|
||||
Current set 5: 400129 - - -
|
||||
L1 HIT
|
||||
Count_Block Update
|
||||
Changed set 5: 400129 - - -
|
||||
|
|
@ -0,0 +1,12 @@
|
|||
1. These are the debug runs, which provide a step-by-step execution of the trace through the simulator. The debug runs are not run for the entire trace, but only the first few addresses (about 1000). This should be enough to expose logical flaws during debugging.
|
||||
|
||||
2. The following commands are to be used:
|
||||
./sim_cache 16 16384 1 0 0 gcc_trace.txt > DebugRun1.txt
|
||||
|
||||
./sim_cache 128 2048 8 0 1 go_trace.txt > DebugRun2.txt
|
||||
|
||||
./sim_cache 32 4096 4 0 1 perl_trace.txt > DebugRun3.txt
|
||||
|
||||
./sim_cache 64 8192 2 1 0 gcc_trace.txt > DebugRun4.txt
|
||||
|
||||
./sim_cache 32 1024 4 1 1 go_trace.txt > DebugRun5.txt
|
||||
|
|
@ -0,0 +1,45 @@
|
|||
CC = g++
|
||||
OPT = -O3 -m32
|
||||
#OPT = -g -m32
|
||||
WARN = -Wall
|
||||
CFLAGS = $(OPT) $(WARN) $(INC) $(LIB)
|
||||
|
||||
# List all your .cc files here (source files, excluding header files)
|
||||
SIM_SRC = main.cc world.cc
|
||||
|
||||
# List corresponding compiled object files here (.o files)
|
||||
SIM_OBJ = main.o world.o
|
||||
|
||||
#################################
|
||||
|
||||
# default rule
|
||||
|
||||
all: sim_cache
|
||||
@echo "my work is done here..."
|
||||
|
||||
|
||||
# rule for making sim_cache
|
||||
|
||||
sim_cache: $(SIM_OBJ)
|
||||
$(CC) -o sim_cache $(CFLAGS) $(SIM_OBJ) -lm
|
||||
@echo "-----------DONE WITH SIM_CACHE-----------"
|
||||
|
||||
|
||||
# generic rule for converting any .cc file to any .o file
|
||||
|
||||
.cc.o:
|
||||
$(CC) $(CFLAGS) -c $*.cc
|
||||
|
||||
|
||||
# type "make clean" to remove all .o files plus the sim_cache binary
|
||||
|
||||
clean:
|
||||
rm -f *.o sim_cache
|
||||
|
||||
|
||||
# type "make clobber" to remove all .o files (leaves sim_cache binary)
|
||||
|
||||
clobber:
|
||||
rm -f *.o
|
||||
|
||||
|
||||
|
|
@ -0,0 +1,6 @@
|
|||
|
||||
#include "world.h"
|
||||
|
||||
int main(int argc, char *argv[]) {
|
||||
hello_world(argc, argv);
|
||||
}
|
||||
|
|
@ -0,0 +1,10 @@
|
|||
#include <stdio.h>
|
||||
|
||||
void hello_world(int argc, char *argv[]) {
|
||||
printf("\n\nHello World!\n\n");
|
||||
|
||||
for (unsigned int i = 0; i < (unsigned int)argc; i++)
|
||||
printf("argument #%d = %s\n", i, argv[i]);
|
||||
|
||||
printf("\n\n");
|
||||
}
|
||||
|
|
@ -0,0 +1 @@
|
|||
void hello_world(int argc, char *argv[]);
|
||||
|
|
@ -0,0 +1,14 @@
|
|||
1. Download all the source files (.cc, .h) plus the Makefile to your own directory. (To download, click on the link with your right mouse button and select "Save Link As...".)
|
||||
2. "make" (this will create the binary, sim_cache)
|
||||
3. Try running "sim_cache" with any number of arguments. It will simply print "Hello World!" and then echo all the arguments back to you. For example, try this example from the Project 1 spec:
|
||||
./sim_cache 32 8192 4 0 1 gcc_trace.txt
|
||||
4. "make clean" (this will remove all .o files and the binary sim_cache)
|
||||
5. "make" (build again)
|
||||
6. "make clobber" (this will remove only .o files, leaving the binary sim_cache)
|
||||
---------------------------------------------------------------------
|
||||
You only need the Makefile from this directory. (The other bogus .cc/.h files are merely there as an example.)
|
||||
What you need to modify in the Makefile for your own needs:
|
||||
1. In the Makefile, replace all the .cc filenames with your .cc filenames, on the line labeled SIM_SRC. You can use as few or as many .cc files as you want.
|
||||
2. Likewise, update the names of .o files in the Makefile, on the line labeled SIM_OBJ. There must be a corresponding .o file for every .cc file.
|
||||
----------------------------------------------------------------------
|
||||
If you are using a different language/compiler, replace CC with your preferred compiler. You may also need to modify the default CFLAGS, depending on what other arguments your compiler requires. Also, if you use a different language, then you may need to change the .cc extensions to something else.
|
||||
File diff suppressed because it is too large
Load Diff
File diff suppressed because it is too large
Load Diff
File diff suppressed because it is too large
Load Diff
File diff suppressed because it is too large
Load Diff
|
|
@ -0,0 +1,24 @@
|
|||
===== Simulator configuration =====
|
||||
L1_BLOCKSIZE: 128
|
||||
L1_SIZE: 2048
|
||||
L1_ASSOC: 8
|
||||
L1_REPLACEMENT_POLICY: 0
|
||||
L1_WRITE_POLICY: 1
|
||||
trace_file: go_trace.txt
|
||||
===================================
|
||||
|
||||
===== L1 contents =====
|
||||
set 0: 4004e0 400321 40031f 40040c 400320 40040b 4004e1 40040d
|
||||
set 1: 40040c 4004e1 4008b3 400652 400320 40031f 40040d 4004e0
|
||||
|
||||
====== Simulation results (raw) ======
|
||||
a. number of L1 reads: 60613
|
||||
b. number of L1 read misses: 984
|
||||
c. number of L1 writes: 39387
|
||||
d. number of L1 write misses: 26075
|
||||
e. L1 miss rate: 0.2706
|
||||
f. number of writebacks from L1: 0
|
||||
g. total memory traffic: 40371
|
||||
|
||||
==== Simulation results (performance) ====
|
||||
1. average access time: 7.1539 ns
|
||||
|
|
@ -0,0 +1,54 @@
|
|||
===== Simulator configuration =====
|
||||
L1_BLOCKSIZE: 32
|
||||
L1_SIZE: 4096
|
||||
L1_ASSOC: 4
|
||||
L1_REPLACEMENT_POLICY: 0
|
||||
L1_WRITE_POLICY: 1
|
||||
trace_file: perl_trace.txt
|
||||
===================================
|
||||
|
||||
===== L1 contents =====
|
||||
set 0: 10007a 10006d 10007b 100075
|
||||
set 1: 1000b4 10007b 100073 100035
|
||||
set 2: 100035 10007b 1000b3 1000b4
|
||||
set 3: 1000b0 1000a1 100035 10007b
|
||||
set 4: 100035 10006f 1000b4 10007b
|
||||
set 5: 10007b 100058 10007a 10006f
|
||||
set 6: 100079 1000a1 10006f 10007a
|
||||
set 7: 100035 1000a1 10007a 1000b3
|
||||
set 8: 10007b 10007a 1000b4 1000a1
|
||||
set 9: 10007a 10006f 100079 10007b
|
||||
set 10: 1000b2 1000ad 1000ae 10007a
|
||||
set 11: 10002e 1000b2 1000a9 10007a
|
||||
set 12: 1ec0cf 1000a9 100035 10007a
|
||||
set 13: 10007a 1000ad 1ec0cf 10006f
|
||||
set 14: 1000b2 1000b3 1000ad 10007a
|
||||
set 15: 10007a 1000ad 1000b2 1000b3
|
||||
set 16: 10006f 1000b3 1000b0 1000ad
|
||||
set 17: 1000b2 1000b1 1000ad 1000af
|
||||
set 18: 1000b1 1000b3 1000b2 1000ad
|
||||
set 19: 1000ab 1000b3 1000ad 1ec0cf
|
||||
set 20: 1000b3 1000ad 1000aa 10007a
|
||||
set 21: 1000ad 1000b2 100008 10007a
|
||||
set 22: 1ec0cf 10007a 100008 1000b3
|
||||
set 23: 1000b2 1000b3 100064 1ec0cf
|
||||
set 24: 1000b0 1000a0 1000af 100077
|
||||
set 25: 1000ab 1000b1 1000b2 1000b0
|
||||
set 26: 10004e 1000b3 100031 10004c
|
||||
set 27: 1000b3 1ec0cf 10004e 100031
|
||||
set 28: 10007a 1000b0 1000af 1000a0
|
||||
set 29: 1ec0ce 1000b0 10007a 1000b3
|
||||
set 30: 1000b3 1ec0ce 1000b1 1000b2
|
||||
set 31: 100074 1000b3 100077 1000b1
|
||||
|
||||
====== Simulation results (raw) ======
|
||||
a. number of L1 reads: 70107
|
||||
b. number of L1 read misses: 4739
|
||||
c. number of L1 writes: 29893
|
||||
d. number of L1 write misses: 6850
|
||||
e. L1 miss rate: 0.1159
|
||||
f. number of writebacks from L1: 0
|
||||
g. total memory traffic: 34632
|
||||
|
||||
==== Simulation results (performance) ====
|
||||
1. average access time: 2.8532 ns
|
||||
|
|
@ -0,0 +1,86 @@
|
|||
===== Simulator configuration =====
|
||||
L1_BLOCKSIZE: 64
|
||||
L1_SIZE: 8192
|
||||
L1_ASSOC: 2
|
||||
L1_REPLACEMENT_POLICY: 1
|
||||
L1_WRITE_POLICY: 0
|
||||
trace_file: gcc_trace.txt
|
||||
===================================
|
||||
|
||||
===== L1 contents =====
|
||||
set 0: 40033 D 7b035 D
|
||||
set 1: 40056 D 40033 D
|
||||
set 2: 7b035 D 4001f
|
||||
set 3: 40056 D 40055 D
|
||||
set 4: 40055 D 40056 D
|
||||
set 5: 40056 D 7b035 D
|
||||
set 6: 42355 4001f
|
||||
set 7: 4003f D 40056 D
|
||||
set 8: 40038 D 40056 D
|
||||
set 9: 40048 40038 D
|
||||
set 10: 40029 40001
|
||||
set 11: 4001f 40001
|
||||
set 12: 40001 4001f
|
||||
set 13: 40001 40051 D
|
||||
set 14: 40031 D 40051 D
|
||||
set 15: 40035 D 40051 D
|
||||
set 16: 40051 D 40031
|
||||
set 17: 40051 D 40031
|
||||
set 18: 4002f 40031
|
||||
set 19: df8 4001f
|
||||
set 20: 4001f 40036 D
|
||||
set 21: 4001f 40027
|
||||
set 22: 40027 4003e
|
||||
set 23: 40027 40051 D
|
||||
set 24: 4002a D 4001f
|
||||
set 25: df8 40044 D
|
||||
set 26: 40051 D 4003e D
|
||||
set 27: 40037 D 40051 D
|
||||
set 28: 40051 D 4002f D
|
||||
set 29: 40035 D 40051 D
|
||||
set 30: 40051 D 40035
|
||||
set 31: 40055 D 40051 D
|
||||
set 32: 40136 D 4003e D
|
||||
set 33: 40035 D 40051 D
|
||||
set 34: 40051 D 40055 D
|
||||
set 35: 40035 D 40051 D
|
||||
set 36: 40138 D 7b033 D
|
||||
set 37: 7b033 D 40042 D
|
||||
set 38: 40051 D 40055 D
|
||||
set 39: 40051 D 40055 D
|
||||
set 40: 7b033 D 40051 D
|
||||
set 41: 40051 D 40055 D
|
||||
set 42: 40051 D 40055 D
|
||||
set 43: 40051 D 40055 D
|
||||
set 44: 40051 D 40055 D
|
||||
set 45: 40055 D 40051 D
|
||||
set 46: 40051 D 40031 D
|
||||
set 47: 40051 D 40031 D
|
||||
set 48: 40051 D 40055 D
|
||||
set 49: 40055 D 40051 D
|
||||
set 50: 7b034 D 40051 D
|
||||
set 51: 7b034 D 4003e D
|
||||
set 52: 40054 D 40055 D
|
||||
set 53: 7b034 D 40035
|
||||
set 54: 4003f D 40055 D
|
||||
set 55: 40036 D 40055 D
|
||||
set 56: 40055 D 40039
|
||||
set 57: 40022 D 4003e D
|
||||
set 58: 40031 D 40047
|
||||
set 59: 40047 40055 D
|
||||
set 60: 40047 7b034 D
|
||||
set 61: 7b034 D 40047
|
||||
set 62: 4001e 40031 D
|
||||
set 63: 4001c 40032 D
|
||||
|
||||
====== Simulation results (raw) ======
|
||||
a. number of L1 reads: 63640
|
||||
b. number of L1 read misses: 3492
|
||||
c. number of L1 writes: 36360
|
||||
d. number of L1 write misses: 2096
|
||||
e. L1 miss rate: 0.0559
|
||||
f. number of writebacks from L1: 2415
|
||||
g. total memory traffic: 8003
|
||||
|
||||
==== Simulation results (performance) ====
|
||||
1. average access time: 1.6684 ns
|
||||
|
|
@ -0,0 +1,30 @@
|
|||
===== Simulator configuration =====
|
||||
L1_BLOCKSIZE: 32
|
||||
L1_SIZE: 1024
|
||||
L1_ASSOC: 4
|
||||
L1_REPLACEMENT_POLICY: 1
|
||||
L1_WRITE_POLICY: 1
|
||||
trace_file: go_trace.txt
|
||||
===================================
|
||||
|
||||
===== L1 contents =====
|
||||
set 0: 4004e0 400321 40040d 4004e1
|
||||
set 1: 4004e0 4004e1 40040d 4004df
|
||||
set 2: 4004df 4004e1 40040d 4004e0
|
||||
set 3: 4004e1 4004e0 4004df 40040d
|
||||
set 4: 4004e1 4008b3 40040d 400652
|
||||
set 5: 4004e0 4004df 400320 40040c
|
||||
set 6: 4004df 40040c 4004e0 4004de
|
||||
set 7: 40040c 4004df 4004e0 400320
|
||||
|
||||
====== Simulation results (raw) ======
|
||||
a. number of L1 reads: 60613
|
||||
b. number of L1 read misses: 4893
|
||||
c. number of L1 writes: 39387
|
||||
d. number of L1 write misses: 33648
|
||||
e. L1 miss rate: 0.3854
|
||||
f. number of writebacks from L1: 0
|
||||
g. total memory traffic: 44280
|
||||
|
||||
==== Simulation results (performance) ====
|
||||
1. average access time: 8.4985 ns
|
||||
Binary file not shown.
|
|
@ -0,0 +1,11 @@
|
|||
Proj1-2文件夹下包含了“实验一：Cache存储体系设计”第2部分（Advanced Cache）所需的全部材料：
|
||||
|
||||
trace：包含实验所需的所有trace文件，即读/写访存地址流
|
||||
|
||||
validation：包含了所有仿真结果验证文件
|
||||
|
||||
debug：包含了所有仿真器调试文件
|
||||
|
||||
Proj1-2_Specification：实验指导书
|
||||
|
||||
checklist.pdf:自查文件
|
||||
Binary file not shown.
File diff suppressed because it is too large
Load Diff
File diff suppressed because it is too large
Load Diff
File diff suppressed because it is too large
Load Diff
File diff suppressed because it is too large
Load Diff
File diff suppressed because it is too large
Load Diff
File diff suppressed because it is too large
Load Diff
File diff suppressed because it is too large
Load Diff
File diff suppressed because it is too large
Load Diff
|
|
@ -0,0 +1,158 @@
|
|||
===== Simulator configuration =====
|
||||
BLOCKSIZE: 64
|
||||
L1_SIZE: 8192
|
||||
L1_ASSOC: 2
|
||||
Victim_Cache_SIZE: 1024
|
||||
L2_SIZE: 16384
|
||||
L2_ASSOC: 4
|
||||
trace_file: perl_trace.txt
|
||||
===================================
|
||||
===== L1 contents =====
|
||||
set 0: 4002d D 4002c D
|
||||
set 1: 4002c D 4002d D
|
||||
set 2: 40016 D 4002d D
|
||||
set 3: 4002d D 4002c D
|
||||
set 4: 4002d D 4001d D
|
||||
set 5: 4002a 4002c D
|
||||
set 6: 4002b D 4002c D
|
||||
set 7: 4001d 4002c D
|
||||
set 8: 4000f D 4002c D
|
||||
set 9: 40011 D 4002c D
|
||||
set 10: 40002 4002c D
|
||||
set 11: 40002 40019
|
||||
set 12: 4002c D 40028
|
||||
set 13: 40013 D 4002b
|
||||
set 14: 40013 D 4002c
|
||||
set 15: 4001d 40028
|
||||
set 16: 4001b 4000d
|
||||
set 17: 4000d D 4002b
|
||||
set 18: 4000d D 40028
|
||||
set 19: 4001e 4000d
|
||||
set 20: 4001e 40028
|
||||
set 21: 4002b D 4002a
|
||||
set 22: 4000d 4002a
|
||||
set 23: 4002b D 4002c D
|
||||
set 24: 4002b D 4002c D
|
||||
set 25: 4002c D 4002b D
|
||||
set 26: 4002b D 4002c D
|
||||
set 27: 4002b D 4002c D
|
||||
set 28: 4002c D 4002b D
|
||||
set 29: 4000c 4002c D
|
||||
set 30: 4002c D 4002b D
|
||||
set 31: 4002c D 4002b D
|
||||
set 32: 4001e D 4002c D
|
||||
set 33: 4002c D 4002b D
|
||||
set 34: 4001e 4001c D
|
||||
set 35: 4001e 4002c D
|
||||
set 36: 4001e 4002c D
|
||||
set 37: 4001e D 4000b D
|
||||
set 38: 4001e D 4002c D
|
||||
set 39: 4001e D 4002c D
|
||||
set 40: 4002c D 4002b D
|
||||
set 41: 4002c D 4002b D
|
||||
set 42: 4001e 4002a
|
||||
set 43: 40016 D 4001e
|
||||
set 44: 40013 D 4002c D
|
||||
set 45: 40013 4002c D
|
||||
set 46: 4001e D 7b033 D
|
||||
set 47: 7b033 4002c D
|
||||
set 48: 4001e 4001c
|
||||
set 49: 4001e 4002c D
|
||||
set 50: 4001b D 4001e
|
||||
set 51: 4001b D 4002c D
|
||||
set 52: 4001b D 4001e
|
||||
set 53: 4002c D 4001d D
|
||||
set 54: 4001b 7b033 D
|
||||
set 55: 4002c D 4002b D
|
||||
set 56: 4001b D 4002b
|
||||
set 57: 7b033 D 4002c D
|
||||
set 58: 4002c D 4002b D
|
||||
set 59: 7b033 D 4002c D
|
||||
set 60: 4002c D 4002b D
|
||||
set 61: 7b033 D 4002c D
|
||||
set 62: 4002c D 40029 D
|
||||
set 63: 4002c D 4001d
|
||||
===== Victim Cache contents =====
|
||||
set 0: 10004ee D 1000ad4 D 1000b04 D 1000ac3 D 1000774 1000b02 D 1000ac1 D 1000b38 D 1000ac0 D 1000a13 1000aff D 1000afe D 1000b25 1000a7d 1000abc 1000750
|
||||
===== L2 contents =====
|
||||
set 0: 4002d 4002c 4002a D 4002b D
|
||||
set 1: 4002d 4002a D 4002c 4002b
|
||||
set 2: 4002d 4002c 4002a D 4001d D
|
||||
set 3: 4002d 4002a D 4002c 4002b
|
||||
set 4: 4002d 4002c 4002b D 4001d D
|
||||
set 5: 4002b D 4002a D 4002c 4001d D
|
||||
set 6: 4001d D 4002c 4002a D 4002b
|
||||
set 7: 4002a D 4002c 4002b D 4001d D
|
||||
set 8: 4002b D 4002c 4002a D 40028
|
||||
set 9: 4002c 4002a D 4001d D 40011 D
|
||||
set 10: 4002c 4002b D 40002 40028
|
||||
set 11: 4002a 4002c D 4001d D 40028
|
||||
set 12: 4002b D 4002c 40028 4002a D
|
||||
set 13: 4002c D 4002b 4002a D 40028
|
||||
set 14: 4002c D 4002a D 40028 40013 D
|
||||
set 15: 4002c D 4001d 4002a D 40028
|
||||
set 16: 4001d 4002c D 40028 4002a D
|
||||
set 17: 4002b D 4002c D 40028 4000d D
|
||||
set 18: 4002b D 4002c D 40028 4002a D
|
||||
set 19: 40028 4002b D 4002c D 4000d
|
||||
set 20: 40028 4002c D 4002b D 4001d D
|
||||
set 21: 4002c D 4002a D 4001d D 4002b
|
||||
set 22: 4002b D 4002a 4002c D 4000d D
|
||||
set 23: 4002a D 4002c 4001d D 4002b
|
||||
set 24: 4001d D 4002c 4002a D 4002b
|
||||
set 25: 4002a D 4002c 4001d D 4002b
|
||||
set 26: 4001d D 4002c 4002a D 4002b
|
||||
set 27: 4001d D 4002b D 4002c 4002a D
|
||||
set 28: 4002a D 4002c 4001d D 4002b
|
||||
set 29: 4002c 4002b D 4001d D 4002a D
|
||||
set 30: 4002a D 4002c 4001d D 4002b
|
||||
set 31: 4002a D 4002c 4001d D 4002b
|
||||
set 32: 4002b D 4002c 4001e D 4002a D
|
||||
set 33: 4002a D 4002c 4001d D 4002b
|
||||
set 34: 4002c D 4002b D 4001d D 4001c D
|
||||
set 35: 4002b D 4002c 4002a D 4001d D
|
||||
set 36: 4002b D 4002c 4002a D 4001d D
|
||||
set 37: 4002c D 4002b D 4001c 4001e D
|
||||
set 38: 4002c 4002b D 4002a D 4001d D
|
||||
set 39: 4002b D 4002c 4001c D 4002a D
|
||||
set 40: 4002c 4001c D 4002a D 4002b
|
||||
set 41: 4002a D 4002c 4001d D 4002b
|
||||
set 42: 4002c D 4002a D 4002b D 4001d
|
||||
set 43: 4002c D 4002a 4002b D 4001d D
|
||||
set 44: 4002b D 4002c 40013 D 4002a D
|
||||
set 45: 4002b D 4002c 4001c D 40013
|
||||
set 46: 4002c D 4002b D 40013 D 4002a D
|
||||
set 47: 4002b D 4002c 4001c D 7b033 D
|
||||
set 48: 4002c D 4002b D 4001c 4002a D
|
||||
set 49: 4001c D 4002c 4002b D 4001d D
|
||||
set 50: 4002c D 4002b D 4001d D 4002a D
|
||||
set 51: 4002b D 4002c 4001d D 4002a D
|
||||
set 52: 4001d D 4002c D 4002b D 4001c D
|
||||
set 53: 4002b D 4002c 4002a D 4001c D
|
||||
set 54: 4002c D 4002b D 4001d D 4002a D
|
||||
set 55: 4001c D 4002c 4001d D 4002b
|
||||
set 56: 4002b D 4002c 4001d D 4001b D
|
||||
set 57: 4002c 4002b D 4002a D 4001c D
|
||||
set 58: 4001d D 4002c 4002a D 4002b
|
||||
set 59: 4002c 4002b D 4002a D 4001d D
|
||||
set 60: 4002c 4002a D 4002b 4001d D
|
||||
set 61: 4002c 4002b D 40029 D 4001d D
|
||||
set 62: 4002c 4002a D 4002b 4001d D
|
||||
set 63: 4002c 4001c D 4002b 4002a D
|
||||
====== Simulation results (raw) ======
|
||||
a. number of L1 reads: 70107
|
||||
b. number of L1 read misses: 1927
|
||||
c. number of L1 writes: 29893
|
||||
d. number of L1 write misses: 569
|
||||
e. L1 miss rate: 0.0250
|
||||
f. number of swaps: 1382
|
||||
g. number of victim cache writeback: 766
|
||||
h. number of L2 reads: 2496
|
||||
i. number of L2 read misses: 1268
|
||||
j. number of L2 writes: 766
|
||||
k. number of L2 write misses: 123
|
||||
l. L2 miss rate: 0.5080
|
||||
m. number of L2 writebacks: 415
|
||||
n. total memory traffic: 1806
|
||||
==== Simulation results (performance) ====
|
||||
1. average access time: 0.7874 ns
|
||||
|
|
@ -0,0 +1,60 @@
|
|||
===== Simulator configuration =====
|
||||
BLOCKSIZE: 32
|
||||
L1_SIZE: 2048
|
||||
L1_ASSOC: 4
|
||||
Victim_Cache_SIZE: 0
|
||||
L2_SIZE: 4096
|
||||
L2_ASSOC: 8
|
||||
trace_file: gcc_trace.txt
|
||||
===================================
|
||||
===== L1 contents =====
|
||||
set 0: 20028d D 20018a 20028e D 200198 D
|
||||
set 1: 2001c1 D 20028d D 200153 D 20013b
|
||||
set 2: 200223 D 20028d D 200241 2001c1
|
||||
set 3: 20018a 2001ac D 20028e D 20028d D
|
||||
set 4: 20018f D 2000f9 20017a D 20018a
|
||||
set 5: 200009 20017a 2000fa 20018a
|
||||
set 6: 200009 2000f9 20028d D 20018a
|
||||
set 7: 200009 2001ac 2000fa 200149
|
||||
set 8: 200009 3d819c D 20017b D 2000f9
|
||||
set 9: 200009 2000fa 2000f9 2001b2 D
|
||||
set 10: 200009 200214 2000fa 20023f
|
||||
set 11: 200009 2001ab 20013a 20023f
|
||||
set 12: 20018f D 2001f2 2001aa 20018a D
|
||||
set 13: 20028d D 20018d D 20013a 20028c D
|
||||
set 14: 20013a 20018d D 20028d D 2001ad D
|
||||
set 15: 2001f8 D 20028c D 20013a 20018d D
|
||||
===== L2 contents =====
|
||||
set 0: 20018a 20028e 200198 2001ab 2001d1 D 20017a D 20028d 2001f4 D
|
||||
set 1: 2001c1 200153 D 20028e D 20013b 200198 D 2000fb 2001d1 D 20028d
|
||||
set 2: 200241 20028d D 200223 200149 200198 D 20018a 2001c1 D 20013b
|
||||
set 3: 2001ac 2001c1 D 20028e 2001b0 D 20028d 20028c D 20018a 2001bd D
|
||||
set 4: 2000f9 20028e D 20018a 20028d D 20017a D 20023f 200149 2002b1 D
|
||||
set 5: 20017a 20028e D 200009 20028d D 2000fa 2001b2 D 20018a 20023f
|
||||
set 6: 200009 2000f9 2001b2 D 20023f 2001ac D 2001ad D 20028d 20028c D
|
||||
set 7: 200009 20028d D 2000fa 2001b2 D 2001ac 20023f 200149 2001f6 D
|
||||
set 8: 200009 20017b D 2000fa 2001b2 D 2000f9 20028d D 20023f 200149
|
||||
set 9: 200009 2000fa 20028d D 2001b2 20023f 3d819c D 20028c D 2001aa
|
||||
set 10: 200009 200214 D 20028d D 20023f 2001ab D 2001aa 2001fc D 2000fa
|
||||
set 11: 200009 2001ab 20028d D 20023f 2001aa 200214 D 20028c D 20013a
|
||||
set 12: 20018f 2001aa 20018a 2001f2 20023f 20028d D 20018d D 2001ab
|
||||
set 13: 20028d 2001b3 D 20018d 2001ab D 20013a 2001b2 D 20028c 2001fe D
|
||||
set 14: 20028d 20028c D 20018d 2001a7 D 20013a 2001b2 D 2001ad D 2001fd D
|
||||
set 15: 20013a 20028d D 20018d 200197 D 2001f8 2001a9 D 200222 D 2001d1 D
|
||||
====== Simulation results (raw) ======
|
||||
a. number of L1 reads: 63640
|
||||
b. number of L1 read misses: 5170
|
||||
c. number of L1 writes: 36360
|
||||
d. number of L1 write misses: 4452
|
||||
e. L1 miss rate: 0.0962
|
||||
f. number of swaps: 0
|
||||
g. number of victim cache writeback: 0
|
||||
h. number of L2 reads: 9622
|
||||
i. number of L2 read misses: 5313
|
||||
j. number of L2 writes: 4942
|
||||
k. number of L2 write misses: 151
|
||||
l. L2 miss rate: 0.5522
|
||||
m. number of L2 writebacks: 2978
|
||||
n. total memory traffic: 8442
|
||||
==== Simulation results (performance) ====
|
||||
1. average access time: 1.7920 ns
|
||||
|
|
@ -0,0 +1,164 @@
|
|||
===== Simulator configuration =====
|
||||
BLOCKSIZE: 16
|
||||
L1_SIZE: 1024
|
||||
L1_ASSOC: 8
|
||||
Victim_Cache_SIZE: 0
|
||||
L2_SIZE: 8192
|
||||
L2_ASSOC: 4
|
||||
trace_file: go_trace.txt
|
||||
===================================
|
||||
===== L1 contents =====
|
||||
set 0: 800470 D 80046f D 80046e D 80046d D 80046c D 80046b D 80046a D 800469 D
|
||||
set 1: 800470 D 80046f D 80046e D 80046d D 80046c D 80046b D 80046a D 800469 D
|
||||
set 2: 800470 D 80046f D 80046e D 80046d D 80046c D 80046b D 80046a D 800469 D
|
||||
set 3: 800470 D 80046f D 80046e D 80046d D 80046c D 80046b D 80046a D 800469 D
|
||||
set 4: 800470 D 80046f D 80046e D 80046d D 80046c D 80046b D 80046a D 800469 D
|
||||
set 5: 80046f D 80046e D 80046d D 80046c D 80046b D 80046a D 800469 D 800468 D
|
||||
set 6: 80046f D 80046e D 80046d D 80046c D 80046b D 80046a D 800469 D 800468 D
|
||||
set 7: 80046f D 80046e D 80046d D 80046c D 80046b D 80046a D 800469 D 800468 D
|
||||
===== L2 contents =====
|
||||
set 0: 80047 80046 D 80045 D 80044 D
|
||||
set 1: 80047 80046 D 80045 D 80044 D
|
||||
set 2: 80047 80046 D 80045 D 80044 D
|
||||
set 3: 80047 80046 D 80045 D 80044 D
|
||||
set 4: 80047 80046 D 80045 D 80044 D
|
||||
set 5: 80046 D 80045 D 80044 D 80043 D
|
||||
set 6: 80046 D 80045 D 80044 D 80043 D
|
||||
set 7: 80046 D 80045 D 80044 D 80043 D
|
||||
set 8: 80046 D 80045 D 80044 D 80043 D
|
||||
set 9: 80046 D 80045 D 80044 D 80043 D
|
||||
set 10: 80046 D 80045 D 80044 D 80043 D
|
||||
set 11: 80046 D 80045 D 80044 D 80043 D
|
||||
set 12: 80046 D 80045 D 80044 D 80043 D
|
||||
set 13: 80046 D 80045 D 80044 D 80043 D
|
||||
set 14: 80046 D 80045 D 80044 D 80043 D
|
||||
set 15: 80046 D 80045 D 80044 D 80043 D
|
||||
set 16: 80046 D 80045 D 80044 D 80043 D
|
||||
set 17: 80046 D 80045 D 80044 D 80043 D
|
||||
set 18: 80046 D 80045 D 80044 D 80043 D
|
||||
set 19: 80046 D 80045 D 80044 D 80043 D
|
||||
set 20: 80046 D 80045 D 80044 D 80043 D
|
||||
set 21: 80046 D 80045 D 80044 D 80043 D
|
||||
set 22: 80046 D 80045 D 80044 D 80043 D
|
||||
set 23: 80046 D 80045 D 80044 D 80043 D
|
||||
set 24: 80046 D 80045 D 80044 D 80043 D
|
||||
set 25: 80046 D 80045 D 80044 D 80043 D
|
||||
set 26: 80046 D 80045 D 80044 D 80043 D
|
||||
set 27: 80046 D 80045 D 80044 D 80043 D
|
||||
set 28: 80046 D 80045 D 80044 D 80043 D
|
||||
set 29: 80046 D 80045 D 80044 D 80043 D
|
||||
set 30: 80046 D 80045 D 80044 D 80043 D
|
||||
set 31: 80046 D 80045 D 80044 D 80043 D
|
||||
set 32: 80046 D 80045 D 80044 D 80043 D
|
||||
set 33: 80046 D 80045 D 80044 D 80043 D
|
||||
set 34: 80046 D 80045 D 80044 D 80043 D
|
||||
set 35: 80046 D 80045 D 80044 D 80043 D
|
||||
set 36: 80046 D 80045 D 80044 D 80043 D
|
||||
set 37: 80046 D 80045 D 80044 D 80043 D
|
||||
set 38: 80046 D 80045 D 80044 D 80043 D
|
||||
set 39: 80046 D 80045 D 80044 D 80043 D
|
||||
set 40: 80046 D 80045 D 80044 D 80043 D
|
||||
set 41: 80046 D 80045 D 80044 D 80043 D
|
||||
set 42: 80046 D 80045 D 80044 D 80043 D
|
||||
set 43: 80046 D 80045 D 80044 D 80043 D
|
||||
set 44: 80046 D 80045 D 80044 D 80043 D
|
||||
set 45: 80046 D 80045 D 80044 D 80043 D
|
||||
set 46: 80046 D 80045 D 80044 D 80043 D
|
||||
set 47: 80046 D 80045 D 80044 D 80043 D
|
||||
set 48: 80046 D 80045 D 80044 D 80043 D
|
||||
set 49: 80046 D 80045 D 80044 D 80043 D
|
||||
set 50: 80046 D 80045 D 80044 D 80043 D
|
||||
set 51: 80046 D 80045 D 80044 D 80043 D
|
||||
set 52: 80046 D 80045 D 80044 D 80043 D
|
||||
set 53: 80046 D 80045 D 80044 D 80043 D
|
||||
set 54: 80046 D 80045 D 80044 D 80043 D
|
||||
set 55: 80046 D 80045 D 80044 D 80043 D
|
||||
set 56: 80046 D 80045 D 80044 D 80043 D
|
||||
set 57: 80046 D 80045 D 80044 D 80043 D
|
||||
set 58: 80046 D 80045 D 80044 D 80043 D
|
||||
set 59: 80046 D 80045 D 80044 D 80043 D
|
||||
set 60: 80046 D 80045 D 80044 D 80043 D
|
||||
set 61: 80046 D 80045 D 80044 D 80043 D
|
||||
set 62: 80046 D 80045 D 80044 D 80043 D
|
||||
set 63: 80046 D 80045 D 80044 D 80043 D
|
||||
set 64: 80046 D 80045 D 80044 D 80043 D
|
||||
set 65: 80046 D 80045 D 80044 D 80043 D
|
||||
set 66: 80046 D 80045 D 80044 D 80043 D
|
||||
set 67: 80046 D 80045 D 80044 D 80043 D
|
||||
set 68: 80046 D 80045 D 80044 D 80043 D
|
||||
set 69: 80046 80045 D 80044 D 80043 D
|
||||
set 70: 80046 80045 D 80044 D 80043 D
|
||||
set 71: 80046 80045 D 80044 D 80043 D
|
||||
set 72: 80046 80045 D 80044 D 80043 D
|
||||
set 73: 80046 80045 D 80044 D 80043 D
|
||||
set 74: 80046 80045 D 80044 D 80043 D
|
||||
set 75: 80046 80045 D 80044 D 80043 D
|
||||
set 76: 80046 80045 D 80044 D 80043 D
|
||||
set 77: 80046 80045 D 80044 D 80043 D
|
||||
set 78: 80046 80045 D 80044 D 80043 D
|
||||
set 79: 80046 80045 D 80044 D 80043 D
|
||||
set 80: 80046 80045 D 80044 D 80043 D
|
||||
set 81: 80046 80045 D 80044 D 80043 D
|
||||
set 82: 80046 80045 D 80044 D 80043 D
|
||||
set 83: 80046 80045 D 80044 D 80043 D
|
||||
set 84: 80046 80045 D 80044 D 80043 D
|
||||
set 85: 80046 80045 D 80044 D 80043 D
|
||||
set 86: 80046 80045 D 80044 D 80043 D
|
||||
set 87: 80046 80045 D 80044 D 80043 D
|
||||
set 88: 80046 80045 D 80044 D 80043 D
|
||||
set 89: 80046 80045 D 80044 D 80043 D
|
||||
set 90: 80046 80045 D 80044 D 80043 D
|
||||
set 91: 80046 80045 D 80044 D 80043 D
|
||||
set 92: 80046 80045 D 80044 D 80043 D
|
||||
set 93: 80046 80045 D 80044 D 80043 D
|
||||
set 94: 80046 80045 D 80044 D 80043 D
|
||||
set 95: 80046 80045 D 80044 D 80043 D
|
||||
set 96: 80046 80045 D 80044 D 80043 D
|
||||
set 97: 80046 80045 D 80044 D 80043 D
|
||||
set 98: 80046 80045 D 80044 D 80043 D
|
||||
set 99: 80046 80045 D 80044 D 80043 D
|
||||
set 100: 80046 80045 D 80044 D 80043 D
|
||||
set 101: 80046 80045 D 80044 D 80043 D
|
||||
set 102: 80046 80045 D 80044 D 80043 D
|
||||
set 103: 80046 80045 D 80044 D 80043 D
|
||||
set 104: 80046 80045 D 80044 D 80043 D
|
||||
set 105: 80046 80045 D 80044 D 80043 D
|
||||
set 106: 80046 80045 D 80044 D 80043 D
|
||||
set 107: 80046 80045 D 80044 D 80043 D
|
||||
set 108: 80046 80045 D 80044 D 80043 D
|
||||
set 109: 80046 80045 D 80044 D 80043 D
|
||||
set 110: 80046 80045 D 80044 D 80043 D
|
||||
set 111: 80046 80045 D 80044 D 80043 D
|
||||
set 112: 80046 80045 D 80044 D 80043 D
|
||||
set 113: 80046 80045 D 80044 D 80043 D
|
||||
set 114: 80046 80045 D 80044 D 80043 D
|
||||
set 115: 80046 80045 D 80044 D 80043 D
|
||||
set 116: 80046 80045 D 80044 D 80043 D
|
||||
set 117: 80046 80045 D 80044 D 80043 D
|
||||
set 118: 80046 80045 D 80044 D 80043 D
|
||||
set 119: 80046 80045 D 80044 D 80043 D
|
||||
set 120: 80046 80045 D 80044 D 80043 D
|
||||
set 121: 80046 80045 D 80044 D 80043 D
|
||||
set 122: 80046 80045 D 80044 D 80043 D
|
||||
set 123: 80046 80045 D 80044 D 80043 D
|
||||
set 124: 80046 80045 D 80044 D 80043 D
|
||||
set 125: 80046 80045 D 80044 D 80043 D
|
||||
set 126: 80046 80045 D 80044 D 80043 D
|
||||
set 127: 80046 80045 D 80044 D 80043 D
|
||||
====== Simulation results (raw) ======
|
||||
a. number of L1 reads: 60613
|
||||
b. number of L1 read misses: 3819
|
||||
c. number of L1 writes: 39387
|
||||
d. number of L1 write misses: 6341
|
||||
e. L1 miss rate: 0.1016
|
||||
f. number of swaps: 0
|
||||
g. number of victim cache writeback: 0
|
||||
h. number of L2 reads: 10160
|
||||
i. number of L2 read misses: 9847
|
||||
j. number of L2 writes: 8323
|
||||
k. number of L2 write misses: 3
|
||||
l. L2 miss rate: 0.9692
|
||||
m. number of L2 writebacks: 7869
|
||||
n. total memory traffic: 17719
|
||||
==== Simulation results (performance) ====
|
||||
1. average access time: 2.7692 ns
|
||||
|
|
@ -0,0 +1,33 @@
|
|||
===== Simulator configuration =====
|
||||
BLOCKSIZE: 32
|
||||
L1_SIZE: 1024
|
||||
L1_ASSOC: 8
|
||||
Victim_Cache_SIZE: 256
|
||||
L2_SIZE: 0
|
||||
L2_ASSOC: 0
|
||||
trace_file: perl_trace.txt
|
||||
===================================
|
||||
===== L1 contents =====
|
||||
set 0: 8003d7 80037c D 800276 D 8003d8 800379 800368 f6067b D 8003d9
|
||||
set 1: 80056c 800045 80058c 8003d7 8002c1 D 800379 8003d8 80037b
|
||||
set 2: 800045 80058c D 8003d2 800379 D f6067d D 80018e 8003d8 f60677
|
||||
set 3: 800580 8003d1 f6067d D 800325 80018e 8003d8 8003d2 D 800276
|
||||
===== Victim Cache contents =====
|
||||
set 0: 2000f4f 3d819ed D 20006a2 D 20009da 3d819dd 20006a1 20006a5 D 2000f4c D
|
||||
====== Simulation results (raw) ======
|
||||
a. number of L1 reads: 70107
|
||||
b. number of L1 read misses: 14002
|
||||
c. number of L1 writes: 29893
|
||||
d. number of L1 write misses: 4835
|
||||
e. L1 miss rate: 0.1884
|
||||
f. number of swaps: 4060
|
||||
g. number of victim cache writeback: 6735
|
||||
h. number of L2 reads: 0
|
||||
i. number of L2 read misses: 0
|
||||
j. number of L2 writes: 0
|
||||
k. number of L2 write misses: 0
|
||||
l. L2 miss rate: 0
|
||||
m. number of L2 writebacks: 0
|
||||
n. total memory traffic: 25572
|
||||
==== Simulation results (performance) ====
|
||||
1. average access time: 4.4607 ns
|
||||
|
|
@ -0,0 +1,42 @@
|
|||
===== Simulator configuration =====
|
||||
BLOCKSIZE: 128
|
||||
L1_SIZE: 1024
|
||||
L1_ASSOC: 2
|
||||
Victim_Cache_SIZE: 1024
|
||||
L2_SIZE: 4096
|
||||
L2_ASSOC: 4
|
||||
trace_file: gcc_trace.txt
|
||||
===================================
|
||||
===== L1 contents =====
|
||||
set 0: 2001c1 D 20028d D
|
||||
set 1: 200009 20017a
|
||||
set 2: 200009 200214
|
||||
set 3: 2001f8 D 20028c D
|
||||
===== Victim Cache contents =====
|
||||
set 0: f60672 D 80063d D 80088c D 800904 8006b1 800628 8006ae 80063f D
|
||||
===== L2 contents =====
|
||||
set 0: 1000c5 1000d6 D 100147 D 1000cc D
|
||||
set 1: 1000bd D 100147 D 10007d 1000d6
|
||||
set 2: 10010a 1000d9 D 10009d 10007d
|
||||
set 3: 1000fc D 1000c5 D 1000d5 10009d
|
||||
set 4: 1000a9 D 100120 100111 100146 D
|
||||
set 5: 100004 10007c 1000c7 D 100146 D
|
||||
set 6: 100004 1000bd D 1000d5 10007c
|
||||
set 7: 1000c7 1000d5 1000c6 D 10011f
|
||||
====== Simulation results (raw) ======
|
||||
a. number of L1 reads: 63640
|
||||
b. number of L1 read misses: 8160
|
||||
c. number of L1 writes: 36360
|
||||
d. number of L1 write misses: 3824
|
||||
e. L1 miss rate: 0.1198
|
||||
f. number of swaps: 9722
|
||||
g. number of victim cache writeback: 4763
|
||||
h. number of L2 reads: 11984
|
||||
i. number of L2 read misses: 7690
|
||||
j. number of L2 writes: 4763
|
||||
k. number of L2 write misses: 1205
|
||||
l. L2 miss rate: 0.6417
|
||||
m. number of L2 writebacks: 3198
|
||||
n. total memory traffic: 12093
|
||||
==== Simulation results (performance) ====
|
||||
1. average access time: 2.6884 ns
|
||||
Binary file not shown.
|
|
@ -0,0 +1,13 @@
|
|||
Proj1-1文件夹下包含了“实验一：Cache存储体系设计”第一部分（Generic Cache）所需的全部材料：
|
||||
|
||||
src：包含源码初始框架和Makefile文件
|
||||
|
||||
trace：包含实验所需的所有trace文件，即读/写访存地址流
|
||||
|
||||
validation：包含了所有仿真结果验证文件
|
||||
|
||||
debug：包含了所有仿真器调试文件
|
||||
|
||||
Proj1-1_Specification：实验指导书
|
||||
|
||||
checklist.pdf:自查文件
|
||||
|
|
@ -0,0 +1,19 @@
|
|||
Proj1-1文件夹下包含了“实验一：Cache存储体系设计”第一部分（Generic Cache）所需的全部材料：
|
||||
|
||||
src：包含源码初始框架和Makefile文件
|
||||
|
||||
trace：包含实验所需的所有trace文件，即读/写访存地址流
|
||||
|
||||
validation：包含了所有仿真结果验证文件
|
||||
|
||||
debug：包含了所有仿真器调试文件
|
||||
|
||||
Proj1-1_Specification：实验指导书
|
||||
|
||||
checklist.pdf:自查文件
|
||||
|
||||
Cache 结构如图：
|
||||
|
||||
|
||||
---
|
||||
|
||||
Binary file not shown.
|
|
@ -0,0 +1,619 @@
|
|||
# 1 : Write 400341a0
|
||||
L1 Write: 400341a0(tag 1000d, index 26)
|
||||
Current set 26: -
|
||||
L1 MISS
|
||||
L1 UPDATE LRU
|
||||
L1 SET DIRTY
|
||||
Changed set 26: 1000d D
|
||||
# 2 : Read dfcfa8
|
||||
L1 Read: dfcfa8(tag 37f, index 250)
|
||||
Current set 250: -
|
||||
L1 MISS
|
||||
L1 UPDATE LRU
|
||||
Changed set 250: 37f
|
||||
# 3 : Write 7b034dd4
|
||||
L1 Write: 7b034dd4(tag 1ec0d, index 221)
|
||||
Current set 221: -
|
||||
L1 MISS
|
||||
L1 UPDATE LRU
|
||||
L1 SET DIRTY
|
||||
Changed set 221: 1ec0d D
|
||||
# 4 : Read df7c48
|
||||
L1 Read: df7c48(tag 37d, index 964)
|
||||
Current set 964: -
|
||||
L1 MISS
|
||||
L1 UPDATE LRU
|
||||
Changed set 964: 37d
|
||||
# 5 : Read 7b034dd4
|
||||
L1 Read: 7b034dd4(tag 1ec0d, index 221)
|
||||
Current set 221: 1ec0d D
|
||||
L1 HIT
|
||||
L1 UPDATE LRU
|
||||
Changed set 221: 1ec0d D
|
||||
# 6 : Read 423aebbc
|
||||
L1 Read: 423aebbc(tag 108eb, index 699)
|
||||
Current set 699: -
|
||||
L1 MISS
|
||||
L1 UPDATE LRU
|
||||
Changed set 699: 108eb
|
||||
# 7 : Read 423aebb8
|
||||
L1 Read: 423aebb8(tag 108eb, index 699)
|
||||
Current set 699: 108eb
|
||||
L1 HIT
|
||||
L1 UPDATE LRU
|
||||
Changed set 699: 108eb
|
||||
# 8 : Read 423aebbc
|
||||
L1 Read: 423aebbc(tag 108eb, index 699)
|
||||
Current set 699: 108eb
|
||||
L1 HIT
|
||||
L1 UPDATE LRU
|
||||
Changed set 699: 108eb
|
||||
# 9 : Read 40002634
|
||||
L1 Read: 40002634(tag 10000, index 611)
|
||||
Current set 611: -
|
||||
L1 MISS
|
||||
L1 UPDATE LRU
|
||||
Changed set 611: 10000
|
||||
# 10 : Write 40139dd0
|
||||
L1 Write: 40139dd0(tag 1004e, index 477)
|
||||
Current set 477: -
|
||||
L1 MISS
|
||||
L1 UPDATE LRU
|
||||
L1 SET DIRTY
|
||||
Changed set 477: 1004e D
|
||||
# 11 : Read 423aeb9c
|
||||
L1 Read: 423aeb9c(tag 108eb, index 697)
|
||||
Current set 697: -
|
||||
L1 MISS
|
||||
L1 UPDATE LRU
|
||||
Changed set 697: 108eb
|
||||
# 12 : Write 40139dd4
|
||||
L1 Write: 40139dd4(tag 1004e, index 477)
|
||||
Current set 477: 1004e D
|
||||
L1 HIT
|
||||
L1 UPDATE LRU
|
||||
L1 SET DIRTY
|
||||
Changed set 477: 1004e D
|
||||
# 13 : Write 40138938
|
||||
L1 Write: 40138938(tag 1004e, index 147)
|
||||
Current set 147: -
|
||||
L1 MISS
|
||||
L1 UPDATE LRU
|
||||
L1 SET DIRTY
|
||||
Changed set 147: 1004e D
|
||||
# 14 : Read 423aeba0
|
||||
L1 Read: 423aeba0(tag 108eb, index 698)
|
||||
Current set 698: -
|
||||
L1 MISS
|
||||
L1 UPDATE LRU
|
||||
Changed set 698: 108eb
|
||||
# 15 : Write 4013893c
|
||||
L1 Write: 4013893c(tag 1004e, index 147)
|
||||
Current set 147: 1004e D
|
||||
L1 HIT
|
||||
L1 UPDATE LRU
|
||||
L1 SET DIRTY
|
||||
Changed set 147: 1004e D
|
||||
# 16 : Read 7b034dcc
|
||||
L1 Read: 7b034dcc(tag 1ec0d, index 220)
|
||||
Current set 220: -
|
||||
L1 MISS
|
||||
L1 UPDATE LRU
|
||||
Changed set 220: 1ec0d
|
||||
# 17 : Read df8a70
|
||||
L1 Read: df8a70(tag 37e, index 167)
|
||||
Current set 167: -
|
||||
L1 MISS
|
||||
L1 UPDATE LRU
|
||||
Changed set 167: 37e
|
||||
# 18 : Write 7b034c50
|
||||
L1 Write: 7b034c50(tag 1ec0d, index 197)
|
||||
Current set 197: -
|
||||
L1 MISS
|
||||
L1 UPDATE LRU
|
||||
L1 SET DIRTY
|
||||
Changed set 197: 1ec0d D
|
||||
# 19 : Write 7b034c68
|
||||
L1 Write: 7b034c68(tag 1ec0d, index 198)
|
||||
Current set 198: -
|
||||
L1 MISS
|
||||
L1 UPDATE LRU
|
||||
L1 SET DIRTY
|
||||
Changed set 198: 1ec0d D
|
||||
# 20 : Read df9f10
|
||||
L1 Read: df9f10(tag 37e, index 497)
|
||||
Current set 497: -
|
||||
L1 MISS
|
||||
L1 UPDATE LRU
|
||||
Changed set 497: 37e
|
||||
# 21 : Write 7b034da8
|
||||
L1 Write: 7b034da8(tag 1ec0d, index 218)
|
||||
Current set 218: -
|
||||
L1 MISS
|
||||
L1 UPDATE LRU
|
||||
L1 SET DIRTY
|
||||
Changed set 218: 1ec0d D
|
||||
# 22 : Read 7b034dcc
|
||||
L1 Read: 7b034dcc(tag 1ec0d, index 220)
|
||||
Current set 220: 1ec0d
|
||||
L1 HIT
|
||||
L1 UPDATE LRU
|
||||
Changed set 220: 1ec0d
|
||||
# 23 : Read df8a74
|
||||
L1 Read: df8a74(tag 37e, index 167)
|
||||
Current set 167: 37e
|
||||
L1 HIT
|
||||
L1 UPDATE LRU
|
||||
Changed set 167: 37e
|
||||
# 24 : Write 7b034c54
|
||||
L1 Write: 7b034c54(tag 1ec0d, index 197)
|
||||
Current set 197: 1ec0d D
|
||||
L1 HIT
|
||||
L1 UPDATE LRU
|
||||
L1 SET DIRTY
|
||||
Changed set 197: 1ec0d D
|
||||
# 25 : Write 7b034c6c
|
||||
L1 Write: 7b034c6c(tag 1ec0d, index 198)
|
||||
Current set 198: 1ec0d D
|
||||
L1 HIT
|
||||
L1 UPDATE LRU
|
||||
L1 SET DIRTY
|
||||
Changed set 198: 1ec0d D
|
||||
# 26 : Read df9f14
|
||||
L1 Read: df9f14(tag 37e, index 497)
|
||||
Current set 497: 37e
|
||||
L1 HIT
|
||||
L1 UPDATE LRU
|
||||
Changed set 497: 37e
|
||||
# 27 : Write 7b034dac
|
||||
L1 Write: 7b034dac(tag 1ec0d, index 218)
|
||||
Current set 218: 1ec0d D
|
||||
L1 HIT
|
||||
L1 UPDATE LRU
|
||||
L1 SET DIRTY
|
||||
Changed set 218: 1ec0d D
|
||||
# 28 : Read 40138938
|
||||
L1 Read: 40138938(tag 1004e, index 147)
|
||||
Current set 147: 1004e D
|
||||
L1 HIT
|
||||
L1 UPDATE LRU
|
||||
Changed set 147: 1004e D
|
||||
# 29 : Write 7b034d90
|
||||
L1 Write: 7b034d90(tag 1ec0d, index 217)
|
||||
Current set 217: -
|
||||
L1 MISS
|
||||
L1 UPDATE LRU
|
||||
L1 SET DIRTY
|
||||
Changed set 217: 1ec0d D
|
||||
# 30 : Read 7b034c68
|
||||
L1 Read: 7b034c68(tag 1ec0d, index 198)
|
||||
Current set 198: 1ec0d D
|
||||
L1 HIT
|
||||
L1 UPDATE LRU
|
||||
Changed set 198: 1ec0d D
|
||||
# 31 : Read df84d4
|
||||
L1 Read: df84d4(tag 37e, index 77)
|
||||
Current set 77: -
|
||||
L1 MISS
|
||||
L1 UPDATE LRU
|
||||
Changed set 77: 37e
|
||||
# 32 : Read df84d5
|
||||
L1 Read: df84d5(tag 37e, index 77)
|
||||
Current set 77: 37e
|
||||
L1 HIT
|
||||
L1 UPDATE LRU
|
||||
Changed set 77: 37e
|
||||
# 33 : Read df84d6
|
||||
L1 Read: df84d6(tag 37e, index 77)
|
||||
Current set 77: 37e
|
||||
L1 HIT
|
||||
L1 UPDATE LRU
|
||||
Changed set 77: 37e
|
||||
# 34 : Read df84d7
|
||||
L1 Read: df84d7(tag 37e, index 77)
|
||||
Current set 77: 37e
|
||||
L1 HIT
|
||||
L1 UPDATE LRU
|
||||
Changed set 77: 37e
|
||||
# 35 : Read df84d8
|
||||
L1 Read: df84d8(tag 37e, index 77)
|
||||
Current set 77: 37e
|
||||
L1 HIT
|
||||
L1 UPDATE LRU
|
||||
Changed set 77: 37e
|
||||
# 36 : Read df84d9
|
||||
L1 Read: df84d9(tag 37e, index 77)
|
||||
Current set 77: 37e
|
||||
L1 HIT
|
||||
L1 UPDATE LRU
|
||||
Changed set 77: 37e
|
||||
# 37 : Read df84da
|
||||
L1 Read: df84da(tag 37e, index 77)
|
||||
Current set 77: 37e
|
||||
L1 HIT
|
||||
L1 UPDATE LRU
|
||||
Changed set 77: 37e
|
||||
# 38 : Read df84db
|
||||
L1 Read: df84db(tag 37e, index 77)
|
||||
Current set 77: 37e
|
||||
L1 HIT
|
||||
L1 UPDATE LRU
|
||||
Changed set 77: 37e
|
||||
# 39 : Read df84dc
|
||||
L1 Read: df84dc(tag 37e, index 77)
|
||||
Current set 77: 37e
|
||||
L1 HIT
|
||||
L1 UPDATE LRU
|
||||
Changed set 77: 37e
|
||||
# 40 : Read df84dd
|
||||
L1 Read: df84dd(tag 37e, index 77)
|
||||
Current set 77: 37e
|
||||
L1 HIT
|
||||
L1 UPDATE LRU
|
||||
Changed set 77: 37e
|
||||
# 41 : Read df84de
|
||||
L1 Read: df84de(tag 37e, index 77)
|
||||
Current set 77: 37e
|
||||
L1 HIT
|
||||
L1 UPDATE LRU
|
||||
Changed set 77: 37e
|
||||
# 42 : Read df84df
|
||||
L1 Read: df84df(tag 37e, index 77)
|
||||
Current set 77: 37e
|
||||
L1 HIT
|
||||
L1 UPDATE LRU
|
||||
Changed set 77: 37e
|
||||
# 43 : Read df84e0
|
||||
L1 Read: df84e0(tag 37e, index 78)
|
||||
Current set 78: -
|
||||
L1 MISS
|
||||
L1 UPDATE LRU
|
||||
Changed set 78: 37e
|
||||
# 44 : Read df84e1
|
||||
L1 Read: df84e1(tag 37e, index 78)
|
||||
Current set 78: 37e
|
||||
L1 HIT
|
||||
L1 UPDATE LRU
|
||||
Changed set 78: 37e
|
||||
# 45 : Read df84e2
|
||||
L1 Read: df84e2(tag 37e, index 78)
|
||||
Current set 78: 37e
|
||||
L1 HIT
|
||||
L1 UPDATE LRU
|
||||
Changed set 78: 37e
|
||||
# 46 : Read df84e3
|
||||
L1 Read: df84e3(tag 37e, index 78)
|
||||
Current set 78: 37e
|
||||
L1 HIT
|
||||
L1 UPDATE LRU
|
||||
Changed set 78: 37e
|
||||
# 47 : Read 4013893c
|
||||
L1 Read: 4013893c(tag 1004e, index 147)
|
||||
Current set 147: 1004e D
|
||||
L1 HIT
|
||||
L1 UPDATE LRU
|
||||
Changed set 147: 1004e D
|
||||
# 48 : Write 7b034d94
|
||||
L1 Write: 7b034d94(tag 1ec0d, index 217)
|
||||
Current set 217: 1ec0d D
|
||||
L1 HIT
|
||||
L1 UPDATE LRU
|
||||
L1 SET DIRTY
|
||||
Changed set 217: 1ec0d D
|
||||
# 49 : Read 7b034c6c
|
||||
L1 Read: 7b034c6c(tag 1ec0d, index 198)
|
||||
Current set 198: 1ec0d D
|
||||
L1 HIT
|
||||
L1 UPDATE LRU
|
||||
Changed set 198: 1ec0d D
|
||||
# 50 : Read df84e4
|
||||
L1 Read: df84e4(tag 37e, index 78)
|
||||
Current set 78: 37e
|
||||
L1 HIT
|
||||
L1 UPDATE LRU
|
||||
Changed set 78: 37e
|
||||
# 51 : Read df84e5
|
||||
L1 Read: df84e5(tag 37e, index 78)
|
||||
Current set 78: 37e
|
||||
L1 HIT
|
||||
L1 UPDATE LRU
|
||||
Changed set 78: 37e
|
||||
# 52 : Read df84e6
|
||||
L1 Read: df84e6(tag 37e, index 78)
|
||||
Current set 78: 37e
|
||||
L1 HIT
|
||||
L1 UPDATE LRU
|
||||
Changed set 78: 37e
|
||||
# 53 : Read df84e7
|
||||
L1 Read: df84e7(tag 37e, index 78)
|
||||
Current set 78: 37e
|
||||
L1 HIT
|
||||
L1 UPDATE LRU
|
||||
Changed set 78: 37e
|
||||
# 54 : Read df84e8
|
||||
L1 Read: df84e8(tag 37e, index 78)
|
||||
Current set 78: 37e
|
||||
L1 HIT
|
||||
L1 UPDATE LRU
|
||||
Changed set 78: 37e
|
||||
# 55 : Read df84e9
|
||||
L1 Read: df84e9(tag 37e, index 78)
|
||||
Current set 78: 37e
|
||||
L1 HIT
|
||||
L1 UPDATE LRU
|
||||
Changed set 78: 37e
|
||||
# 56 : Read df84ea
|
||||
L1 Read: df84ea(tag 37e, index 78)
|
||||
Current set 78: 37e
|
||||
L1 HIT
|
||||
L1 UPDATE LRU
|
||||
Changed set 78: 37e
|
||||
# 57 : Read df84eb
|
||||
L1 Read: df84eb(tag 37e, index 78)
|
||||
Current set 78: 37e
|
||||
L1 HIT
|
||||
L1 UPDATE LRU
|
||||
Changed set 78: 37e
|
||||
# 58 : Read df84ec
|
||||
L1 Read: df84ec(tag 37e, index 78)
|
||||
Current set 78: 37e
|
||||
L1 HIT
|
||||
L1 UPDATE LRU
|
||||
Changed set 78: 37e
|
||||
# 59 : Read df84ed
|
||||
L1 Read: df84ed(tag 37e, index 78)
|
||||
Current set 78: 37e
|
||||
L1 HIT
|
||||
L1 UPDATE LRU
|
||||
Changed set 78: 37e
|
||||
# 60 : Read df84ee
|
||||
L1 Read: df84ee(tag 37e, index 78)
|
||||
Current set 78: 37e
|
||||
L1 HIT
|
||||
L1 UPDATE LRU
|
||||
Changed set 78: 37e
|
||||
# 61 : Read df84ef
|
||||
L1 Read: df84ef(tag 37e, index 78)
|
||||
Current set 78: 37e
|
||||
L1 HIT
|
||||
L1 UPDATE LRU
|
||||
Changed set 78: 37e
|
||||
# 62 : Read df84f0
|
||||
L1 Read: df84f0(tag 37e, index 79)
|
||||
Current set 79: -
|
||||
L1 MISS
|
||||
L1 UPDATE LRU
|
||||
Changed set 79: 37e
|
||||
# 63 : Read df84f1
|
||||
L1 Read: df84f1(tag 37e, index 79)
|
||||
Current set 79: 37e
|
||||
L1 HIT
|
||||
L1 UPDATE LRU
|
||||
Changed set 79: 37e
|
||||
# 64 : Read df84f2
|
||||
L1 Read: df84f2(tag 37e, index 79)
|
||||
Current set 79: 37e
|
||||
L1 HIT
|
||||
L1 UPDATE LRU
|
||||
Changed set 79: 37e
|
||||
# 65 : Read df84f3
|
||||
L1 Read: df84f3(tag 37e, index 79)
|
||||
Current set 79: 37e
|
||||
L1 HIT
|
||||
L1 UPDATE LRU
|
||||
Changed set 79: 37e
|
||||
# 66 : Read df84f4
|
||||
L1 Read: df84f4(tag 37e, index 79)
|
||||
Current set 79: 37e
|
||||
L1 HIT
|
||||
L1 UPDATE LRU
|
||||
Changed set 79: 37e
|
||||
# 67 : Read df84f5
|
||||
L1 Read: df84f5(tag 37e, index 79)
|
||||
Current set 79: 37e
|
||||
L1 HIT
|
||||
L1 UPDATE LRU
|
||||
Changed set 79: 37e
|
||||
# 68 : Read 40138938
|
||||
L1 Read: 40138938(tag 1004e, index 147)
|
||||
Current set 147: 1004e D
|
||||
L1 HIT
|
||||
L1 UPDATE LRU
|
||||
Changed set 147: 1004e D
|
||||
# 69 : Read 423aeb90
|
||||
L1 Read: 423aeb90(tag 108eb, index 697)
|
||||
Current set 697: 108eb
|
||||
L1 HIT
|
||||
L1 UPDATE LRU
|
||||
Changed set 697: 108eb
|
||||
# 70 : Write 7b034d58
|
||||
L1 Write: 7b034d58(tag 1ec0d, index 213)
|
||||
Current set 213: -
|
||||
L1 MISS
|
||||
L1 UPDATE LRU
|
||||
L1 SET DIRTY
|
||||
Changed set 213: 1ec0d D
|
||||
# 71 : Write 7b034c80
|
||||
L1 Write: 7b034c80(tag 1ec0d, index 200)
|
||||
Current set 200: -
|
||||
L1 MISS
|
||||
L1 UPDATE LRU
|
||||
L1 SET DIRTY
|
||||
Changed set 200: 1ec0d D
|
||||
# 72 : Read 7b034c68
|
||||
L1 Read: 7b034c68(tag 1ec0d, index 198)
|
||||
Current set 198: 1ec0d D
|
||||
L1 HIT
|
||||
L1 UPDATE LRU
|
||||
Changed set 198: 1ec0d D
|
||||
# 73 : Read df84d4
|
||||
L1 Read: df84d4(tag 37e, index 77)
|
||||
Current set 77: 37e
|
||||
L1 HIT
|
||||
L1 UPDATE LRU
|
||||
Changed set 77: 37e
|
||||
# 74 : Read 40138938
|
||||
L1 Read: 40138938(tag 1004e, index 147)
|
||||
Current set 147: 1004e D
|
||||
L1 HIT
|
||||
L1 UPDATE LRU
|
||||
Changed set 147: 1004e D
|
||||
# 75 : Read 40139dd0
|
||||
L1 Read: 40139dd0(tag 1004e, index 477)
|
||||
Current set 477: 1004e D
|
||||
L1 HIT
|
||||
L1 UPDATE LRU
|
||||
Changed set 477: 1004e D
|
||||
# 76 : Read 423aeb92
|
||||
L1 Read: 423aeb92(tag 108eb, index 697)
|
||||
Current set 697: 108eb
|
||||
L1 HIT
|
||||
L1 UPDATE LRU
|
||||
Changed set 697: 108eb
|
||||
# 77 : Read 423aeb94
|
||||
L1 Read: 423aeb94(tag 108eb, index 697)
|
||||
Current set 697: 108eb
|
||||
L1 HIT
|
||||
L1 UPDATE LRU
|
||||
Changed set 697: 108eb
|
||||
# 78 : Read 423aeb88
|
||||
L1 Read: 423aeb88(tag 108eb, index 696)
|
||||
Current set 696: -
|
||||
L1 MISS
|
||||
L1 UPDATE LRU
|
||||
Changed set 696: 108eb
|
||||
# 79 : Read 423aeb88
|
||||
L1 Read: 423aeb88(tag 108eb, index 696)
|
||||
Current set 696: 108eb
|
||||
L1 HIT
|
||||
L1 UPDATE LRU
|
||||
Changed set 696: 108eb
|
||||
# 80 : Read 423aeb88
|
||||
L1 Read: 423aeb88(tag 108eb, index 696)
|
||||
Current set 696: 108eb
|
||||
L1 HIT
|
||||
L1 UPDATE LRU
|
||||
Changed set 696: 108eb
|
||||
# 81 : Read 423aeb88
|
||||
L1 Read: 423aeb88(tag 108eb, index 696)
|
||||
Current set 696: 108eb
|
||||
L1 HIT
|
||||
L1 UPDATE LRU
|
||||
Changed set 696: 108eb
|
||||
# 82 : Read 423aeb8c
|
||||
L1 Read: 423aeb8c(tag 108eb, index 696)
|
||||
Current set 696: 108eb
|
||||
L1 HIT
|
||||
L1 UPDATE LRU
|
||||
Changed set 696: 108eb
|
||||
# 83 : Read 42351e38
|
||||
L1 Read: 42351e38(tag 108d4, index 483)
|
||||
Current set 483: -
|
||||
L1 MISS
|
||||
L1 UPDATE LRU
|
||||
Changed set 483: 108d4
|
||||
# 84 : Read 42351e3c
|
||||
L1 Read: 42351e3c(tag 108d4, index 483)
|
||||
Current set 483: 108d4
|
||||
L1 HIT
|
||||
L1 UPDATE LRU
|
||||
Changed set 483: 108d4
|
||||
# 85 : Read 423aeb88
|
||||
L1 Read: 423aeb88(tag 108eb, index 696)
|
||||
Current set 696: 108eb
|
||||
L1 HIT
|
||||
L1 UPDATE LRU
|
||||
Changed set 696: 108eb
|
||||
# 86 : Write 40022e80
|
||||
L1 Write: 40022e80(tag 10008, index 744)
|
||||
Current set 744: -
|
||||
L1 MISS
|
||||
L1 UPDATE LRU
|
||||
L1 SET DIRTY
|
||||
Changed set 744: 10008 D
|
||||
# 87 : Read 423aeb88
|
||||
L1 Read: 423aeb88(tag 108eb, index 696)
|
||||
Current set 696: 108eb
|
||||
L1 HIT
|
||||
L1 UPDATE LRU
|
||||
Changed set 696: 108eb
|
||||
# 88 : Read 4214c9d4
|
||||
L1 Read: 4214c9d4(tag 10853, index 157)
|
||||
Current set 157: -
|
||||
L1 MISS
|
||||
L1 UPDATE LRU
|
||||
Changed set 157: 10853
|
||||
# 89 : Read 40002178
|
||||
L1 Read: 40002178(tag 10000, index 535)
|
||||
Current set 535: -
|
||||
L1 MISS
|
||||
L1 UPDATE LRU
|
||||
Changed set 535: 10000
|
||||
# 90 : Read 384130
|
||||
L1 Read: 384130(tag e1, index 19)
|
||||
Current set 19: -
|
||||
L1 MISS
|
||||
L1 UPDATE LRU
|
||||
Changed set 19: e1
|
||||
# 91 : Read 423aeb8c
|
||||
L1 Read: 423aeb8c(tag 108eb, index 696)
|
||||
Current set 696: 108eb
|
||||
L1 HIT
|
||||
L1 UPDATE LRU
|
||||
Changed set 696: 108eb
|
||||
# 92 : Read 42351e38
|
||||
L1 Read: 42351e38(tag 108d4, index 483)
|
||||
Current set 483: 108d4
|
||||
L1 HIT
|
||||
L1 UPDATE LRU
|
||||
Changed set 483: 108d4
|
||||
# 93 : Read 42351e3c
|
||||
L1 Read: 42351e3c(tag 108d4, index 483)
|
||||
Current set 483: 108d4
|
||||
L1 HIT
|
||||
L1 UPDATE LRU
|
||||
Changed set 483: 108d4
|
||||
# 94 : Read 401367d0
|
||||
L1 Read: 401367d0(tag 1004d, index 637)
|
||||
Current set 637: -
|
||||
L1 MISS
|
||||
L1 UPDATE LRU
|
||||
Changed set 637: 1004d
|
||||
# 95 : Read 7b0345e4
|
||||
L1 Read: 7b0345e4(tag 1ec0d, index 94)
|
||||
Current set 94: -
|
||||
L1 MISS
|
||||
L1 UPDATE LRU
|
||||
Changed set 94: 1ec0d
|
||||
# 96 : Write 423aeb8c
|
||||
L1 Write: 423aeb8c(tag 108eb, index 696)
|
||||
Current set 696: 108eb
|
||||
L1 HIT
|
||||
L1 UPDATE LRU
|
||||
L1 SET DIRTY
|
||||
Changed set 696: 108eb D
|
||||
# 97 : Write 423aeb94
|
||||
L1 Write: 423aeb94(tag 108eb, index 697)
|
||||
Current set 697: 108eb
|
||||
L1 HIT
|
||||
L1 UPDATE LRU
|
||||
L1 SET DIRTY
|
||||
Changed set 697: 108eb D
|
||||
# 98 : Read 40022e80
|
||||
L1 Read: 40022e80(tag 10008, index 744)
|
||||
Current set 744: 10008 D
|
||||
L1 HIT
|
||||
L1 UPDATE LRU
|
||||
Changed set 744: 10008 D
|
||||
# 99 : Read 40139dd0
|
||||
L1 Read: 40139dd0(tag 1004e, index 477)
|
||||
Current set 477: 1004e D
|
||||
L1 HIT
|
||||
L1 UPDATE LRU
|
||||
Changed set 477: 1004e D
|
||||
# 100 : Read 423aeb9c
|
||||
L1 Read: 423aeb9c(tag 108eb, index 697)
|
||||
Current set 697: 108eb D
|
||||
L1 HIT
|
||||
L1 UPDATE LRU
|
||||
Changed set 697: 108eb D
|
||||
|
|
@ -0,0 +1,555 @@
|
|||
# 1 : Read 40012998
|
||||
L1 Read: 40012998(tag 400129, index 1)
|
||||
Current set 1: - - - - - - - -
|
||||
L1 MISS
|
||||
L1 UPDATE LRU
|
||||
Changed set 1: 400129 - - - - - - -
|
||||
# 2 : Read 40012988
|
||||
L1 Read: 40012988(tag 400129, index 1)
|
||||
Current set 1: 400129 - - - - - - -
|
||||
L1 HIT
|
||||
L1 UPDATE LRU
|
||||
Changed set 1: 400129 - - - - - - -
|
||||
# 3 : Read 4008b390
|
||||
L1 Read: 4008b390(tag 4008b3, index 1)
|
||||
Current set 1: 400129 - - - - - - -
|
||||
L1 MISS
|
||||
L1 UPDATE LRU
|
||||
Changed set 1: 400129 4008b3 - - - - - -
|
||||
# 4 : Write 4002e84c
|
||||
L1 Write: 4002e84c(tag 4002e8, index 0)
|
||||
Current set 0: - - - - - - - -
|
||||
L1 MISS, WRITE THROUGH
|
||||
Changed set 0: - - - - - - - -
|
||||
# 5 : Write 4002e850
|
||||
L1 Write: 4002e850(tag 4002e8, index 0)
|
||||
Current set 0: - - - - - - - -
|
||||
L1 MISS, WRITE THROUGH
|
||||
Changed set 0: - - - - - - - -
|
||||
# 6 : Read 40012988
|
||||
L1 Read: 40012988(tag 400129, index 1)
|
||||
Current set 1: 400129 4008b3 - - - - - -
|
||||
L1 HIT
|
||||
L1 UPDATE LRU
|
||||
Changed set 1: 400129 4008b3 - - - - - -
|
||||
# 7 : Write 4003c200
|
||||
L1 Write: 4003c200(tag 4003c2, index 0)
|
||||
Current set 0: - - - - - - - -
|
||||
L1 MISS, WRITE THROUGH
|
||||
Changed set 0: - - - - - - - -
|
||||
# 8 : Read 40012988
|
||||
L1 Read: 40012988(tag 400129, index 1)
|
||||
Current set 1: 400129 4008b3 - - - - - -
|
||||
L1 HIT
|
||||
L1 UPDATE LRU
|
||||
Changed set 1: 400129 4008b3 - - - - - -
|
||||
# 9 : Write 40049600
|
||||
L1 Write: 40049600(tag 400496, index 0)
|
||||
Current set 0: - - - - - - - -
|
||||
L1 MISS, WRITE THROUGH
|
||||
Changed set 0: - - - - - - - -
|
||||
# 10 : Read 40012a00
|
||||
L1 Read: 40012a00(tag 40012a, index 0)
|
||||
Current set 0: - - - - - - - -
|
||||
L1 MISS
|
||||
L1 UPDATE LRU
|
||||
Changed set 0: 40012a - - - - - - -
|
||||
# 11 : Read 4001298c
|
||||
L1 Read: 4001298c(tag 400129, index 1)
|
||||
Current set 1: 400129 4008b3 - - - - - -
|
||||
L1 HIT
|
||||
L1 UPDATE LRU
|
||||
Changed set 1: 400129 4008b3 - - - - - -
|
||||
# 12 : Read 4008b390
|
||||
L1 Read: 4008b390(tag 4008b3, index 1)
|
||||
Current set 1: 400129 4008b3 - - - - - -
|
||||
L1 HIT
|
||||
L1 UPDATE LRU
|
||||
Changed set 1: 400129 4008b3 - - - - - -
|
||||
# 13 : Write 4002e84c
|
||||
L1 Write: 4002e84c(tag 4002e8, index 0)
|
||||
Current set 0: 40012a - - - - - - -
|
||||
L1 MISS, WRITE THROUGH
|
||||
Changed set 0: 40012a - - - - - - -
|
||||
# 14 : Write 4002e850
|
||||
L1 Write: 4002e850(tag 4002e8, index 0)
|
||||
Current set 0: 40012a - - - - - - -
|
||||
L1 MISS, WRITE THROUGH
|
||||
Changed set 0: 40012a - - - - - - -
|
||||
# 15 : Read 4001298c
|
||||
L1 Read: 4001298c(tag 400129, index 1)
|
||||
Current set 1: 400129 4008b3 - - - - - -
|
||||
L1 HIT
|
||||
L1 UPDATE LRU
|
||||
Changed set 1: 400129 4008b3 - - - - - -
|
||||
# 16 : Write 4003c204
|
||||
L1 Write: 4003c204(tag 4003c2, index 0)
|
||||
Current set 0: 40012a - - - - - - -
|
||||
L1 MISS, WRITE THROUGH
|
||||
Changed set 0: 40012a - - - - - - -
|
||||
# 17 : Read 4001298c
|
||||
L1 Read: 4001298c(tag 400129, index 1)
|
||||
Current set 1: 400129 4008b3 - - - - - -
|
||||
L1 HIT
|
||||
L1 UPDATE LRU
|
||||
Changed set 1: 400129 4008b3 - - - - - -
|
||||
# 18 : Write 40049604
|
||||
L1 Write: 40049604(tag 400496, index 0)
|
||||
Current set 0: 40012a - - - - - - -
|
||||
L1 MISS, WRITE THROUGH
|
||||
Changed set 0: 40012a - - - - - - -
|
||||
# 19 : Read 40012a04
|
||||
L1 Read: 40012a04(tag 40012a, index 0)
|
||||
Current set 0: 40012a - - - - - - -
|
||||
L1 HIT
|
||||
L1 UPDATE LRU
|
||||
Changed set 0: 40012a - - - - - - -
|
||||
# 20 : Read 40012990
|
||||
L1 Read: 40012990(tag 400129, index 1)
|
||||
Current set 1: 400129 4008b3 - - - - - -
|
||||
L1 HIT
|
||||
L1 UPDATE LRU
|
||||
Changed set 1: 400129 4008b3 - - - - - -
|
||||
# 21 : Read 4008b390
|
||||
L1 Read: 4008b390(tag 4008b3, index 1)
|
||||
Current set 1: 400129 4008b3 - - - - - -
|
||||
L1 HIT
|
||||
L1 UPDATE LRU
|
||||
Changed set 1: 400129 4008b3 - - - - - -
|
||||
# 22 : Write 4002e84c
|
||||
L1 Write: 4002e84c(tag 4002e8, index 0)
|
||||
Current set 0: 40012a - - - - - - -
|
||||
L1 MISS, WRITE THROUGH
|
||||
Changed set 0: 40012a - - - - - - -
|
||||
# 23 : Write 4002e850
|
||||
L1 Write: 4002e850(tag 4002e8, index 0)
|
||||
Current set 0: 40012a - - - - - - -
|
||||
L1 MISS, WRITE THROUGH
|
||||
Changed set 0: 40012a - - - - - - -
|
||||
# 24 : Read 40012990
|
||||
L1 Read: 40012990(tag 400129, index 1)
|
||||
Current set 1: 400129 4008b3 - - - - - -
|
||||
L1 HIT
|
||||
L1 UPDATE LRU
|
||||
Changed set 1: 400129 4008b3 - - - - - -
|
||||
# 25 : Write 4003c208
|
||||
L1 Write: 4003c208(tag 4003c2, index 0)
|
||||
Current set 0: 40012a - - - - - - -
|
||||
L1 MISS, WRITE THROUGH
|
||||
Changed set 0: 40012a - - - - - - -
|
||||
# 26 : Read 40012990
|
||||
L1 Read: 40012990(tag 400129, index 1)
|
||||
Current set 1: 400129 4008b3 - - - - - -
|
||||
L1 HIT
|
||||
L1 UPDATE LRU
|
||||
Changed set 1: 400129 4008b3 - - - - - -
|
||||
# 27 : Write 40049608
|
||||
L1 Write: 40049608(tag 400496, index 0)
|
||||
Current set 0: 40012a - - - - - - -
|
||||
L1 MISS, WRITE THROUGH
|
||||
Changed set 0: 40012a - - - - - - -
|
||||
# 28 : Read 40012a08
|
||||
L1 Read: 40012a08(tag 40012a, index 0)
|
||||
Current set 0: 40012a - - - - - - -
|
||||
L1 HIT
|
||||
L1 UPDATE LRU
|
||||
Changed set 0: 40012a - - - - - - -
|
||||
# 29 : Write 4002e864
|
||||
L1 Write: 4002e864(tag 4002e8, index 0)
|
||||
Current set 0: 40012a - - - - - - -
|
||||
L1 MISS, WRITE THROUGH
|
||||
Changed set 0: 40012a - - - - - - -
|
||||
# 30 : Read 40012994
|
||||
L1 Read: 40012994(tag 400129, index 1)
|
||||
Current set 1: 400129 4008b3 - - - - - -
|
||||
L1 HIT
|
||||
L1 UPDATE LRU
|
||||
Changed set 1: 400129 4008b3 - - - - - -
|
||||
# 31 : Read 4008b390
|
||||
L1 Read: 4008b390(tag 4008b3, index 1)
|
||||
Current set 1: 400129 4008b3 - - - - - -
|
||||
L1 HIT
|
||||
L1 UPDATE LRU
|
||||
Changed set 1: 400129 4008b3 - - - - - -
|
||||
# 32 : Write 4002e84c
|
||||
L1 Write: 4002e84c(tag 4002e8, index 0)
|
||||
Current set 0: 40012a - - - - - - -
|
||||
L1 MISS, WRITE THROUGH
|
||||
Changed set 0: 40012a - - - - - - -
|
||||
# 33 : Write 4002e850
|
||||
L1 Write: 4002e850(tag 4002e8, index 0)
|
||||
Current set 0: 40012a - - - - - - -
|
||||
L1 MISS, WRITE THROUGH
|
||||
Changed set 0: 40012a - - - - - - -
|
||||
# 34 : Read 40012994
|
||||
L1 Read: 40012994(tag 400129, index 1)
|
||||
Current set 1: 400129 4008b3 - - - - - -
|
||||
L1 HIT
|
||||
L1 UPDATE LRU
|
||||
Changed set 1: 400129 4008b3 - - - - - -
|
||||
# 35 : Write 4003c20c
|
||||
L1 Write: 4003c20c(tag 4003c2, index 0)
|
||||
Current set 0: 40012a - - - - - - -
|
||||
L1 MISS, WRITE THROUGH
|
||||
Changed set 0: 40012a - - - - - - -
|
||||
# 36 : Read 40012994
|
||||
L1 Read: 40012994(tag 400129, index 1)
|
||||
Current set 1: 400129 4008b3 - - - - - -
|
||||
L1 HIT
|
||||
L1 UPDATE LRU
|
||||
Changed set 1: 400129 4008b3 - - - - - -
|
||||
# 37 : Write 4004960c
|
||||
L1 Write: 4004960c(tag 400496, index 0)
|
||||
Current set 0: 40012a - - - - - - -
|
||||
L1 MISS, WRITE THROUGH
|
||||
Changed set 0: 40012a - - - - - - -
|
||||
# 38 : Read 40012a0c
|
||||
L1 Read: 40012a0c(tag 40012a, index 0)
|
||||
Current set 0: 40012a - - - - - - -
|
||||
L1 HIT
|
||||
L1 UPDATE LRU
|
||||
Changed set 0: 40012a - - - - - - -
|
||||
# 39 : Read 40012998
|
||||
L1 Read: 40012998(tag 400129, index 1)
|
||||
Current set 1: 400129 4008b3 - - - - - -
|
||||
L1 HIT
|
||||
L1 UPDATE LRU
|
||||
Changed set 1: 400129 4008b3 - - - - - -
|
||||
# 40 : Read 4008b390
|
||||
L1 Read: 4008b390(tag 4008b3, index 1)
|
||||
Current set 1: 400129 4008b3 - - - - - -
|
||||
L1 HIT
|
||||
L1 UPDATE LRU
|
||||
Changed set 1: 400129 4008b3 - - - - - -
|
||||
# 41 : Write 4002e84c
|
||||
L1 Write: 4002e84c(tag 4002e8, index 0)
|
||||
Current set 0: 40012a - - - - - - -
|
||||
L1 MISS, WRITE THROUGH
|
||||
Changed set 0: 40012a - - - - - - -
|
||||
# 42 : Write 4002e850
|
||||
L1 Write: 4002e850(tag 4002e8, index 0)
|
||||
Current set 0: 40012a - - - - - - -
|
||||
L1 MISS, WRITE THROUGH
|
||||
Changed set 0: 40012a - - - - - - -
|
||||
# 43 : Read 40012998
|
||||
L1 Read: 40012998(tag 400129, index 1)
|
||||
Current set 1: 400129 4008b3 - - - - - -
|
||||
L1 HIT
|
||||
L1 UPDATE LRU
|
||||
Changed set 1: 400129 4008b3 - - - - - -
|
||||
# 44 : Write 4003c210
|
||||
L1 Write: 4003c210(tag 4003c2, index 0)
|
||||
Current set 0: 40012a - - - - - - -
|
||||
L1 MISS, WRITE THROUGH
|
||||
Changed set 0: 40012a - - - - - - -
|
||||
# 45 : Read 40012998
|
||||
L1 Read: 40012998(tag 400129, index 1)
|
||||
Current set 1: 400129 4008b3 - - - - - -
|
||||
L1 HIT
|
||||
L1 UPDATE LRU
|
||||
Changed set 1: 400129 4008b3 - - - - - -
|
||||
# 46 : Write 40049610
|
||||
L1 Write: 40049610(tag 400496, index 0)
|
||||
Current set 0: 40012a - - - - - - -
|
||||
L1 MISS, WRITE THROUGH
|
||||
Changed set 0: 40012a - - - - - - -
|
||||
# 47 : Read 40012a10
|
||||
L1 Read: 40012a10(tag 40012a, index 0)
|
||||
Current set 0: 40012a - - - - - - -
|
||||
L1 HIT
|
||||
L1 UPDATE LRU
|
||||
Changed set 0: 40012a - - - - - - -
|
||||
# 48 : Read 4001299c
|
||||
L1 Read: 4001299c(tag 400129, index 1)
|
||||
Current set 1: 400129 4008b3 - - - - - -
|
||||
L1 HIT
|
||||
L1 UPDATE LRU
|
||||
Changed set 1: 400129 4008b3 - - - - - -
|
||||
# 49 : Read 4008b390
|
||||
L1 Read: 4008b390(tag 4008b3, index 1)
|
||||
Current set 1: 400129 4008b3 - - - - - -
|
||||
L1 HIT
|
||||
L1 UPDATE LRU
|
||||
Changed set 1: 400129 4008b3 - - - - - -
|
||||
# 50 : Write 4002e84c
|
||||
L1 Write: 4002e84c(tag 4002e8, index 0)
|
||||
Current set 0: 40012a - - - - - - -
|
||||
L1 MISS, WRITE THROUGH
|
||||
Changed set 0: 40012a - - - - - - -
|
||||
# 51 : Write 4002e850
|
||||
L1 Write: 4002e850(tag 4002e8, index 0)
|
||||
Current set 0: 40012a - - - - - - -
|
||||
L1 MISS, WRITE THROUGH
|
||||
Changed set 0: 40012a - - - - - - -
|
||||
# 52 : Read 4001299c
|
||||
L1 Read: 4001299c(tag 400129, index 1)
|
||||
Current set 1: 400129 4008b3 - - - - - -
|
||||
L1 HIT
|
||||
L1 UPDATE LRU
|
||||
Changed set 1: 400129 4008b3 - - - - - -
|
||||
# 53 : Write 4003c214
|
||||
L1 Write: 4003c214(tag 4003c2, index 0)
|
||||
Current set 0: 40012a - - - - - - -
|
||||
L1 MISS, WRITE THROUGH
|
||||
Changed set 0: 40012a - - - - - - -
|
||||
# 54 : Read 4001299c
|
||||
L1 Read: 4001299c(tag 400129, index 1)
|
||||
Current set 1: 400129 4008b3 - - - - - -
|
||||
L1 HIT
|
||||
L1 UPDATE LRU
|
||||
Changed set 1: 400129 4008b3 - - - - - -
|
||||
# 55 : Write 40049614
|
||||
L1 Write: 40049614(tag 400496, index 0)
|
||||
Current set 0: 40012a - - - - - - -
|
||||
L1 MISS, WRITE THROUGH
|
||||
Changed set 0: 40012a - - - - - - -
|
||||
# 56 : Read 40012a14
|
||||
L1 Read: 40012a14(tag 40012a, index 0)
|
||||
Current set 0: 40012a - - - - - - -
|
||||
L1 HIT
|
||||
L1 UPDATE LRU
|
||||
Changed set 0: 40012a - - - - - - -
|
||||
# 57 : Write 4002e868
|
||||
L1 Write: 4002e868(tag 4002e8, index 0)
|
||||
Current set 0: 40012a - - - - - - -
|
||||
L1 MISS, WRITE THROUGH
|
||||
Changed set 0: 40012a - - - - - - -
|
||||
# 58 : Read 400129a0
|
||||
L1 Read: 400129a0(tag 400129, index 1)
|
||||
Current set 1: 400129 4008b3 - - - - - -
|
||||
L1 HIT
|
||||
L1 UPDATE LRU
|
||||
Changed set 1: 400129 4008b3 - - - - - -
|
||||
# 59 : Read 4008b390
|
||||
L1 Read: 4008b390(tag 4008b3, index 1)
|
||||
Current set 1: 400129 4008b3 - - - - - -
|
||||
L1 HIT
|
||||
L1 UPDATE LRU
|
||||
Changed set 1: 400129 4008b3 - - - - - -
|
||||
# 60 : Write 4002e84c
|
||||
L1 Write: 4002e84c(tag 4002e8, index 0)
|
||||
Current set 0: 40012a - - - - - - -
|
||||
L1 MISS, WRITE THROUGH
|
||||
Changed set 0: 40012a - - - - - - -
|
||||
# 61 : Write 4002e850
|
||||
L1 Write: 4002e850(tag 4002e8, index 0)
|
||||
Current set 0: 40012a - - - - - - -
|
||||
L1 MISS, WRITE THROUGH
|
||||
Changed set 0: 40012a - - - - - - -
|
||||
# 62 : Read 400129a0
|
||||
L1 Read: 400129a0(tag 400129, index 1)
|
||||
Current set 1: 400129 4008b3 - - - - - -
|
||||
L1 HIT
|
||||
L1 UPDATE LRU
|
||||
Changed set 1: 400129 4008b3 - - - - - -
|
||||
# 63 : Write 4003c218
|
||||
L1 Write: 4003c218(tag 4003c2, index 0)
|
||||
Current set 0: 40012a - - - - - - -
|
||||
L1 MISS, WRITE THROUGH
|
||||
Changed set 0: 40012a - - - - - - -
|
||||
# 64 : Read 400129a0
|
||||
L1 Read: 400129a0(tag 400129, index 1)
|
||||
Current set 1: 400129 4008b3 - - - - - -
|
||||
L1 HIT
|
||||
L1 UPDATE LRU
|
||||
Changed set 1: 400129 4008b3 - - - - - -
|
||||
# 65 : Write 40049618
|
||||
L1 Write: 40049618(tag 400496, index 0)
|
||||
Current set 0: 40012a - - - - - - -
|
||||
L1 MISS, WRITE THROUGH
|
||||
Changed set 0: 40012a - - - - - - -
|
||||
# 66 : Read 40012a18
|
||||
L1 Read: 40012a18(tag 40012a, index 0)
|
||||
Current set 0: 40012a - - - - - - -
|
||||
L1 HIT
|
||||
L1 UPDATE LRU
|
||||
Changed set 0: 40012a - - - - - - -
|
||||
# 67 : Read 400129a4
|
||||
L1 Read: 400129a4(tag 400129, index 1)
|
||||
Current set 1: 400129 4008b3 - - - - - -
|
||||
L1 HIT
|
||||
L1 UPDATE LRU
|
||||
Changed set 1: 400129 4008b3 - - - - - -
|
||||
# 68 : Read 4008b390
|
||||
L1 Read: 4008b390(tag 4008b3, index 1)
|
||||
Current set 1: 400129 4008b3 - - - - - -
|
||||
L1 HIT
|
||||
L1 UPDATE LRU
|
||||
Changed set 1: 400129 4008b3 - - - - - -
|
||||
# 69 : Write 4002e84c
|
||||
L1 Write: 4002e84c(tag 4002e8, index 0)
|
||||
Current set 0: 40012a - - - - - - -
|
||||
L1 MISS, WRITE THROUGH
|
||||
Changed set 0: 40012a - - - - - - -
|
||||
# 70 : Write 4002e850
|
||||
L1 Write: 4002e850(tag 4002e8, index 0)
|
||||
Current set 0: 40012a - - - - - - -
|
||||
L1 MISS, WRITE THROUGH
|
||||
Changed set 0: 40012a - - - - - - -
|
||||
# 71 : Read 400129a4
|
||||
L1 Read: 400129a4(tag 400129, index 1)
|
||||
Current set 1: 400129 4008b3 - - - - - -
|
||||
L1 HIT
|
||||
L1 UPDATE LRU
|
||||
Changed set 1: 400129 4008b3 - - - - - -
|
||||
# 72 : Write 4003c21c
|
||||
L1 Write: 4003c21c(tag 4003c2, index 0)
|
||||
Current set 0: 40012a - - - - - - -
|
||||
L1 MISS, WRITE THROUGH
|
||||
Changed set 0: 40012a - - - - - - -
|
||||
# 73 : Read 400129a4
|
||||
L1 Read: 400129a4(tag 400129, index 1)
|
||||
Current set 1: 400129 4008b3 - - - - - -
|
||||
L1 HIT
|
||||
L1 UPDATE LRU
|
||||
Changed set 1: 400129 4008b3 - - - - - -
|
||||
# 74 : Write 4004961c
|
||||
L1 Write: 4004961c(tag 400496, index 0)
|
||||
Current set 0: 40012a - - - - - - -
|
||||
L1 MISS, WRITE THROUGH
|
||||
Changed set 0: 40012a - - - - - - -
|
||||
# 75 : Read 40012a1c
|
||||
L1 Read: 40012a1c(tag 40012a, index 0)
|
||||
Current set 0: 40012a - - - - - - -
|
||||
L1 HIT
|
||||
L1 UPDATE LRU
|
||||
Changed set 0: 40012a - - - - - - -
|
||||
# 76 : Read 400129a8
|
||||
L1 Read: 400129a8(tag 400129, index 1)
|
||||
Current set 1: 400129 4008b3 - - - - - -
|
||||
L1 HIT
|
||||
L1 UPDATE LRU
|
||||
Changed set 1: 400129 4008b3 - - - - - -
|
||||
# 77 : Read 4008b390
|
||||
L1 Read: 4008b390(tag 4008b3, index 1)
|
||||
Current set 1: 400129 4008b3 - - - - - -
|
||||
L1 HIT
|
||||
L1 UPDATE LRU
|
||||
Changed set 1: 400129 4008b3 - - - - - -
|
||||
# 78 : Write 4002e84c
|
||||
L1 Write: 4002e84c(tag 4002e8, index 0)
|
||||
Current set 0: 40012a - - - - - - -
|
||||
L1 MISS, WRITE THROUGH
|
||||
Changed set 0: 40012a - - - - - - -
|
||||
# 79 : Write 4002e850
|
||||
L1 Write: 4002e850(tag 4002e8, index 0)
|
||||
Current set 0: 40012a - - - - - - -
|
||||
L1 MISS, WRITE THROUGH
|
||||
Changed set 0: 40012a - - - - - - -
|
||||
# 80 : Read 400129a8
|
||||
L1 Read: 400129a8(tag 400129, index 1)
|
||||
Current set 1: 400129 4008b3 - - - - - -
|
||||
L1 HIT
|
||||
L1 UPDATE LRU
|
||||
Changed set 1: 400129 4008b3 - - - - - -
|
||||
# 81 : Write 4003c220
|
||||
L1 Write: 4003c220(tag 4003c2, index 0)
|
||||
Current set 0: 40012a - - - - - - -
|
||||
L1 MISS, WRITE THROUGH
|
||||
Changed set 0: 40012a - - - - - - -
|
||||
# 82 : Read 400129a8
|
||||
L1 Read: 400129a8(tag 400129, index 1)
|
||||
Current set 1: 400129 4008b3 - - - - - -
|
||||
L1 HIT
|
||||
L1 UPDATE LRU
|
||||
Changed set 1: 400129 4008b3 - - - - - -
|
||||
# 83 : Write 40049620
|
||||
L1 Write: 40049620(tag 400496, index 0)
|
||||
Current set 0: 40012a - - - - - - -
|
||||
L1 MISS, WRITE THROUGH
|
||||
Changed set 0: 40012a - - - - - - -
|
||||
# 84 : Read 40012a20
|
||||
L1 Read: 40012a20(tag 40012a, index 0)
|
||||
Current set 0: 40012a - - - - - - -
|
||||
L1 HIT
|
||||
L1 UPDATE LRU
|
||||
Changed set 0: 40012a - - - - - - -
|
||||
# 85 : Read 400129ac
|
||||
L1 Read: 400129ac(tag 400129, index 1)
|
||||
Current set 1: 400129 4008b3 - - - - - -
|
||||
L1 HIT
|
||||
L1 UPDATE LRU
|
||||
Changed set 1: 400129 4008b3 - - - - - -
|
||||
# 86 : Read 4008b390
|
||||
L1 Read: 4008b390(tag 4008b3, index 1)
|
||||
Current set 1: 400129 4008b3 - - - - - -
|
||||
L1 HIT
|
||||
L1 UPDATE LRU
|
||||
Changed set 1: 400129 4008b3 - - - - - -
|
||||
# 87 : Write 4002e84c
|
||||
L1 Write: 4002e84c(tag 4002e8, index 0)
|
||||
Current set 0: 40012a - - - - - - -
|
||||
L1 MISS, WRITE THROUGH
|
||||
Changed set 0: 40012a - - - - - - -
|
||||
# 88 : Write 4002e850
|
||||
L1 Write: 4002e850(tag 4002e8, index 0)
|
||||
Current set 0: 40012a - - - - - - -
|
||||
L1 MISS, WRITE THROUGH
|
||||
Changed set 0: 40012a - - - - - - -
|
||||
# 89 : Read 400129ac
|
||||
L1 Read: 400129ac(tag 400129, index 1)
|
||||
Current set 1: 400129 4008b3 - - - - - -
|
||||
L1 HIT
|
||||
L1 UPDATE LRU
|
||||
Changed set 1: 400129 4008b3 - - - - - -
|
||||
# 90 : Write 4003c224
|
||||
L1 Write: 4003c224(tag 4003c2, index 0)
|
||||
Current set 0: 40012a - - - - - - -
|
||||
L1 MISS, WRITE THROUGH
|
||||
Changed set 0: 40012a - - - - - - -
|
||||
# 91 : Read 400129ac
|
||||
L1 Read: 400129ac(tag 400129, index 1)
|
||||
Current set 1: 400129 4008b3 - - - - - -
|
||||
L1 HIT
|
||||
L1 UPDATE LRU
|
||||
Changed set 1: 400129 4008b3 - - - - - -
|
||||
# 92 : Write 40049624
|
||||
L1 Write: 40049624(tag 400496, index 0)
|
||||
Current set 0: 40012a - - - - - - -
|
||||
L1 MISS, WRITE THROUGH
|
||||
Changed set 0: 40012a - - - - - - -
|
||||
# 93 : Read 40012a24
|
||||
L1 Read: 40012a24(tag 40012a, index 0)
|
||||
Current set 0: 40012a - - - - - - -
|
||||
L1 HIT
|
||||
L1 UPDATE LRU
|
||||
Changed set 0: 40012a - - - - - - -
|
||||
# 94 : Read 400129b0
|
||||
L1 Read: 400129b0(tag 400129, index 1)
|
||||
Current set 1: 400129 4008b3 - - - - - -
|
||||
L1 HIT
|
||||
L1 UPDATE LRU
|
||||
Changed set 1: 400129 4008b3 - - - - - -
|
||||
# 95 : Read 4008b390
|
||||
L1 Read: 4008b390(tag 4008b3, index 1)
|
||||
Current set 1: 400129 4008b3 - - - - - -
|
||||
L1 HIT
|
||||
L1 UPDATE LRU
|
||||
Changed set 1: 400129 4008b3 - - - - - -
|
||||
# 96 : Write 4002e84c
|
||||
L1 Write: 4002e84c(tag 4002e8, index 0)
|
||||
Current set 0: 40012a - - - - - - -
|
||||
L1 MISS, WRITE THROUGH
|
||||
Changed set 0: 40012a - - - - - - -
|
||||
# 97 : Write 4002e850
|
||||
L1 Write: 4002e850(tag 4002e8, index 0)
|
||||
Current set 0: 40012a - - - - - - -
|
||||
L1 MISS, WRITE THROUGH
|
||||
Changed set 0: 40012a - - - - - - -
|
||||
# 98 : Read 400129b0
|
||||
L1 Read: 400129b0(tag 400129, index 1)
|
||||
Current set 1: 400129 4008b3 - - - - - -
|
||||
L1 HIT
|
||||
L1 UPDATE LRU
|
||||
Changed set 1: 400129 4008b3 - - - - - -
|
||||
# 99 : Write 4003c228
|
||||
L1 Write: 4003c228(tag 4003c2, index 0)
|
||||
Current set 0: 40012a - - - - - - -
|
||||
L1 MISS, WRITE THROUGH
|
||||
Changed set 0: 40012a - - - - - - -
|
||||
# 100 : Read 400129b0
|
||||
L1 Read: 400129b0(tag 400129, index 1)
|
||||
Current set 1: 400129 4008b3 - - - - - -
|
||||
L1 HIT
|
||||
L1 UPDATE LRU
|
||||
Changed set 1: 400129 4008b3 - - - - - -
|
||||
|
|
@ -0,0 +1,583 @@
|
|||
# 1 : Write 4001b388
|
||||
L1 Write: 4001b388(tag 10006c, index 28)
|
||||
Current set 28: - - - -
|
||||
L1 MISS, WRITE THROUGH
|
||||
Changed set 28: - - - -
|
||||
# 2 : Read 4001b378
|
||||
L1 Read: 4001b378(tag 10006c, index 27)
|
||||
Current set 27: - - - -
|
||||
L1 MISS
|
||||
L1 UPDATE LRU
|
||||
Changed set 27: 10006c - - -
|
||||
# 3 : Write 4001b3af
|
||||
L1 Write: 4001b3af(tag 10006c, index 29)
|
||||
Current set 29: - - - -
|
||||
L1 MISS, WRITE THROUGH
|
||||
Changed set 29: - - - -
|
||||
# 4 : Write 4001b391
|
||||
L1 Write: 4001b391(tag 10006c, index 28)
|
||||
Current set 28: - - - -
|
||||
L1 MISS, WRITE THROUGH
|
||||
Changed set 28: - - - -
|
||||
# 5 : Write 4001b390
|
||||
L1 Write: 4001b390(tag 10006c, index 28)
|
||||
Current set 28: - - - -
|
||||
L1 MISS, WRITE THROUGH
|
||||
Changed set 28: - - - -
|
||||
# 6 : Read 4000d4e4
|
||||
L1 Read: 4000d4e4(tag 100035, index 7)
|
||||
Current set 7: - - - -
|
||||
L1 MISS
|
||||
L1 UPDATE LRU
|
||||
Changed set 7: 100035 - - -
|
||||
# 7 : Read 4000d4e8
|
||||
L1 Read: 4000d4e8(tag 100035, index 7)
|
||||
Current set 7: 100035 - - -
|
||||
L1 HIT
|
||||
L1 UPDATE LRU
|
||||
Changed set 7: 100035 - - -
|
||||
# 8 : Read 4001b388
|
||||
L1 Read: 4001b388(tag 10006c, index 28)
|
||||
Current set 28: - - - -
|
||||
L1 MISS
|
||||
L1 UPDATE LRU
|
||||
Changed set 28: 10006c - - -
|
||||
# 9 : Read 4001b378
|
||||
L1 Read: 4001b378(tag 10006c, index 27)
|
||||
Current set 27: 10006c - - -
|
||||
L1 HIT
|
||||
L1 UPDATE LRU
|
||||
Changed set 27: 10006c - - -
|
||||
# 10 : Read 4000d50f
|
||||
L1 Read: 4000d50f(tag 100035, index 8)
|
||||
Current set 8: - - - -
|
||||
L1 MISS
|
||||
L1 UPDATE LRU
|
||||
Changed set 8: 100035 - - -
|
||||
# 11 : Read 4000d50f
|
||||
L1 Read: 4000d50f(tag 100035, index 8)
|
||||
Current set 8: 100035 - - -
|
||||
L1 HIT
|
||||
L1 UPDATE LRU
|
||||
Changed set 8: 100035 - - -
|
||||
# 12 : Write 400160b8
|
||||
L1 Write: 400160b8(tag 100058, index 5)
|
||||
Current set 5: - - - -
|
||||
L1 MISS, WRITE THROUGH
|
||||
Changed set 5: - - - -
|
||||
# 13 : Write 40013c30
|
||||
L1 Write: 40013c30(tag 10004f, index 1)
|
||||
Current set 1: - - - -
|
||||
L1 MISS, WRITE THROUGH
|
||||
Changed set 1: - - - -
|
||||
# 14 : Write 40013c00
|
||||
L1 Write: 40013c00(tag 10004f, index 0)
|
||||
Current set 0: - - - -
|
||||
L1 MISS, WRITE THROUGH
|
||||
Changed set 0: - - - -
|
||||
# 15 : Read 4000d550
|
||||
L1 Read: 4000d550(tag 100035, index 10)
|
||||
Current set 10: - - - -
|
||||
L1 MISS
|
||||
L1 UPDATE LRU
|
||||
Changed set 10: 100035 - - -
|
||||
# 16 : Read 4000d4d8
|
||||
L1 Read: 4000d4d8(tag 100035, index 6)
|
||||
Current set 6: - - - -
|
||||
L1 MISS
|
||||
L1 UPDATE LRU
|
||||
Changed set 6: 100035 - - -
|
||||
# 17 : Read 4001b378
|
||||
L1 Read: 4001b378(tag 10006c, index 27)
|
||||
Current set 27: 10006c - - -
|
||||
L1 HIT
|
||||
L1 UPDATE LRU
|
||||
Changed set 27: 10006c - - -
|
||||
# 18 : Read 4001b388
|
||||
L1 Read: 4001b388(tag 10006c, index 28)
|
||||
Current set 28: 10006c - - -
|
||||
L1 HIT
|
||||
L1 UPDATE LRU
|
||||
Changed set 28: 10006c - - -
|
||||
# 19 : Write 40013350
|
||||
L1 Write: 40013350(tag 10004c, index 26)
|
||||
Current set 26: - - - -
|
||||
L1 MISS, WRITE THROUGH
|
||||
Changed set 26: - - - -
|
||||
# 20 : Read 4000d45c
|
||||
L1 Read: 4000d45c(tag 100035, index 2)
|
||||
Current set 2: - - - -
|
||||
L1 MISS
|
||||
L1 UPDATE LRU
|
||||
Changed set 2: 100035 - - -
|
||||
# 21 : Read 400160a0
|
||||
L1 Read: 400160a0(tag 100058, index 5)
|
||||
Current set 5: - - - -
|
||||
L1 MISS
|
||||
L1 UPDATE LRU
|
||||
Changed set 5: 100058 - - -
|
||||
# 22 : Read 4001b3a0
|
||||
L1 Read: 4001b3a0(tag 10006c, index 29)
|
||||
Current set 29: - - - -
|
||||
L1 MISS
|
||||
L1 UPDATE LRU
|
||||
Changed set 29: 10006c - - -
|
||||
# 23 : Read 4000caa4
|
||||
L1 Read: 4000caa4(tag 100032, index 21)
|
||||
Current set 21: - - - -
|
||||
L1 MISS
|
||||
L1 UPDATE LRU
|
||||
Changed set 21: 100032 - - -
|
||||
# 24 : Read 4001b3a1
|
||||
L1 Read: 4001b3a1(tag 10006c, index 29)
|
||||
Current set 29: 10006c - - -
|
||||
L1 HIT
|
||||
L1 UPDATE LRU
|
||||
Changed set 29: 10006c - - -
|
||||
# 25 : Read 4000caa4
|
||||
L1 Read: 4000caa4(tag 100032, index 21)
|
||||
Current set 21: 100032 - - -
|
||||
L1 HIT
|
||||
L1 UPDATE LRU
|
||||
Changed set 21: 100032 - - -
|
||||
# 26 : Read 4001b3a2
|
||||
L1 Read: 4001b3a2(tag 10006c, index 29)
|
||||
Current set 29: 10006c - - -
|
||||
L1 HIT
|
||||
L1 UPDATE LRU
|
||||
Changed set 29: 10006c - - -
|
||||
# 27 : Read 4000cb14
|
||||
L1 Read: 4000cb14(tag 100032, index 24)
|
||||
Current set 24: - - - -
|
||||
L1 MISS
|
||||
L1 UPDATE LRU
|
||||
Changed set 24: 100032 - - -
|
||||
# 28 : Read 4000d524
|
||||
L1 Read: 4000d524(tag 100035, index 9)
|
||||
Current set 9: - - - -
|
||||
L1 MISS
|
||||
L1 UPDATE LRU
|
||||
Changed set 9: 100035 - - -
|
||||
# 29 : Read 4000d624
|
||||
L1 Read: 4000d624(tag 100035, index 17)
|
||||
Current set 17: - - - -
|
||||
L1 MISS
|
||||
L1 UPDATE LRU
|
||||
Changed set 17: 100035 - - -
|
||||
# 30 : Read 4001b3a3
|
||||
L1 Read: 4001b3a3(tag 10006c, index 29)
|
||||
Current set 29: 10006c - - -
|
||||
L1 HIT
|
||||
L1 UPDATE LRU
|
||||
Changed set 29: 10006c - - -
|
||||
# 31 : Read 4000b8a3
|
||||
L1 Read: 4000b8a3(tag 10002e, index 5)
|
||||
Current set 5: 100058 - - -
|
||||
L1 MISS
|
||||
L1 UPDATE LRU
|
||||
Changed set 5: 100058 10002e - -
|
||||
# 32 : Read 40013350
|
||||
L1 Read: 40013350(tag 10004c, index 26)
|
||||
Current set 26: - - - -
|
||||
L1 MISS
|
||||
L1 UPDATE LRU
|
||||
Changed set 26: 10004c - - -
|
||||
# 33 : Write 400160e4
|
||||
L1 Write: 400160e4(tag 100058, index 7)
|
||||
Current set 7: 100035 - - -
|
||||
L1 MISS, WRITE THROUGH
|
||||
Changed set 7: 100035 - - -
|
||||
# 34 : Read 4001b3a3
|
||||
L1 Read: 4001b3a3(tag 10006c, index 29)
|
||||
Current set 29: 10006c - - -
|
||||
L1 HIT
|
||||
L1 UPDATE LRU
|
||||
Changed set 29: 10006c - - -
|
||||
# 35 : Read 4000d620
|
||||
L1 Read: 4000d620(tag 100035, index 17)
|
||||
Current set 17: 100035 - - -
|
||||
L1 HIT
|
||||
L1 UPDATE LRU
|
||||
Changed set 17: 100035 - - -
|
||||
# 36 : Read 4000b517
|
||||
L1 Read: 4000b517(tag 10002d, index 8)
|
||||
Current set 8: 100035 - - -
|
||||
L1 MISS
|
||||
L1 UPDATE LRU
|
||||
Changed set 8: 100035 10002d - -
|
||||
# 37 : Read 4000d624
|
||||
L1 Read: 4000d624(tag 100035, index 17)
|
||||
Current set 17: 100035 - - -
|
||||
L1 HIT
|
||||
L1 UPDATE LRU
|
||||
Changed set 17: 100035 - - -
|
||||
# 38 : Read 4001b3a3
|
||||
L1 Read: 4001b3a3(tag 10006c, index 29)
|
||||
Current set 29: 10006c - - -
|
||||
L1 HIT
|
||||
L1 UPDATE LRU
|
||||
Changed set 29: 10006c - - -
|
||||
# 39 : Read 4000b8a3
|
||||
L1 Read: 4000b8a3(tag 10002e, index 5)
|
||||
Current set 5: 100058 10002e - -
|
||||
L1 HIT
|
||||
L1 UPDATE LRU
|
||||
Changed set 5: 100058 10002e - -
|
||||
# 40 : Read 4001b3a3
|
||||
L1 Read: 4001b3a3(tag 10006c, index 29)
|
||||
Current set 29: 10006c - - -
|
||||
L1 HIT
|
||||
L1 UPDATE LRU
|
||||
Changed set 29: 10006c - - -
|
||||
# 41 : Write 400191f0
|
||||
L1 Write: 400191f0(tag 100064, index 15)
|
||||
Current set 15: - - - -
|
||||
L1 MISS, WRITE THROUGH
|
||||
Changed set 15: - - - -
|
||||
# 42 : Read 4001b3a4
|
||||
L1 Read: 4001b3a4(tag 10006c, index 29)
|
||||
Current set 29: 10006c - - -
|
||||
L1 HIT
|
||||
L1 UPDATE LRU
|
||||
Changed set 29: 10006c - - -
|
||||
# 43 : Read 4000b8ac
|
||||
L1 Read: 4000b8ac(tag 10002e, index 5)
|
||||
Current set 5: 100058 10002e - -
|
||||
L1 HIT
|
||||
L1 UPDATE LRU
|
||||
Changed set 5: 100058 10002e - -
|
||||
# 44 : Read 4001b3a4
|
||||
L1 Read: 4001b3a4(tag 10006c, index 29)
|
||||
Current set 29: 10006c - - -
|
||||
L1 HIT
|
||||
L1 UPDATE LRU
|
||||
Changed set 29: 10006c - - -
|
||||
# 45 : Write 400191f1
|
||||
L1 Write: 400191f1(tag 100064, index 15)
|
||||
Current set 15: - - - -
|
||||
L1 MISS, WRITE THROUGH
|
||||
Changed set 15: - - - -
|
||||
# 46 : Read 4001b3a5
|
||||
L1 Read: 4001b3a5(tag 10006c, index 29)
|
||||
Current set 29: 10006c - - -
|
||||
L1 HIT
|
||||
L1 UPDATE LRU
|
||||
Changed set 29: 10006c - - -
|
||||
# 47 : Read 4000b8b2
|
||||
L1 Read: 4000b8b2(tag 10002e, index 5)
|
||||
Current set 5: 100058 10002e - -
|
||||
L1 HIT
|
||||
L1 UPDATE LRU
|
||||
Changed set 5: 100058 10002e - -
|
||||
# 48 : Read 4001b3a5
|
||||
L1 Read: 4001b3a5(tag 10006c, index 29)
|
||||
Current set 29: 10006c - - -
|
||||
L1 HIT
|
||||
L1 UPDATE LRU
|
||||
Changed set 29: 10006c - - -
|
||||
# 49 : Write 400191f2
|
||||
L1 Write: 400191f2(tag 100064, index 15)
|
||||
Current set 15: - - - -
|
||||
L1 MISS, WRITE THROUGH
|
||||
Changed set 15: - - - -
|
||||
# 50 : Read 4001b3a6
|
||||
L1 Read: 4001b3a6(tag 10006c, index 29)
|
||||
Current set 29: 10006c - - -
|
||||
L1 HIT
|
||||
L1 UPDATE LRU
|
||||
Changed set 29: 10006c - - -
|
||||
# 51 : Read 4000b8ab
|
||||
L1 Read: 4000b8ab(tag 10002e, index 5)
|
||||
Current set 5: 100058 10002e - -
|
||||
L1 HIT
|
||||
L1 UPDATE LRU
|
||||
Changed set 5: 100058 10002e - -
|
||||
# 52 : Read 4001b3a6
|
||||
L1 Read: 4001b3a6(tag 10006c, index 29)
|
||||
Current set 29: 10006c - - -
|
||||
L1 HIT
|
||||
L1 UPDATE LRU
|
||||
Changed set 29: 10006c - - -
|
||||
# 53 : Write 400191f3
|
||||
L1 Write: 400191f3(tag 100064, index 15)
|
||||
Current set 15: - - - -
|
||||
L1 MISS, WRITE THROUGH
|
||||
Changed set 15: - - - -
|
||||
# 54 : Read 4001b3a7
|
||||
L1 Read: 4001b3a7(tag 10006c, index 29)
|
||||
Current set 29: 10006c - - -
|
||||
L1 HIT
|
||||
L1 UPDATE LRU
|
||||
Changed set 29: 10006c - - -
|
||||
# 55 : Read 4000b8a1
|
||||
L1 Read: 4000b8a1(tag 10002e, index 5)
|
||||
Current set 5: 100058 10002e - -
|
||||
L1 HIT
|
||||
L1 UPDATE LRU
|
||||
Changed set 5: 100058 10002e - -
|
||||
# 56 : Read 4001b3a7
|
||||
L1 Read: 4001b3a7(tag 10006c, index 29)
|
||||
Current set 29: 10006c - - -
|
||||
L1 HIT
|
||||
L1 UPDATE LRU
|
||||
Changed set 29: 10006c - - -
|
||||
# 57 : Write 400191f4
|
||||
L1 Write: 400191f4(tag 100064, index 15)
|
||||
Current set 15: - - - -
|
||||
L1 MISS, WRITE THROUGH
|
||||
Changed set 15: - - - -
|
||||
# 58 : Read 4001b3a8
|
||||
L1 Read: 4001b3a8(tag 10006c, index 29)
|
||||
Current set 29: 10006c - - -
|
||||
L1 HIT
|
||||
L1 UPDATE LRU
|
||||
Changed set 29: 10006c - - -
|
||||
# 59 : Read 4000b85d
|
||||
L1 Read: 4000b85d(tag 10002e, index 2)
|
||||
Current set 2: 100035 - - -
|
||||
L1 MISS
|
||||
L1 UPDATE LRU
|
||||
Changed set 2: 100035 10002e - -
|
||||
# 60 : Read 4001b3a8
|
||||
L1 Read: 4001b3a8(tag 10006c, index 29)
|
||||
Current set 29: 10006c - - -
|
||||
L1 HIT
|
||||
L1 UPDATE LRU
|
||||
Changed set 29: 10006c - - -
|
||||
# 61 : Read 4000b4d1
|
||||
L1 Read: 4000b4d1(tag 10002d, index 6)
|
||||
Current set 6: 100035 - - -
|
||||
L1 MISS
|
||||
L1 UPDATE LRU
|
||||
Changed set 6: 100035 10002d - -
|
||||
# 62 : Read 400191f4
|
||||
L1 Read: 400191f4(tag 100064, index 15)
|
||||
Current set 15: - - - -
|
||||
L1 MISS
|
||||
L1 UPDATE LRU
|
||||
Changed set 15: 100064 - - -
|
||||
# 63 : Write 400191f5
|
||||
L1 Write: 400191f5(tag 100064, index 15)
|
||||
Current set 15: 100064 - - -
|
||||
L1 HIT
|
||||
L1 UPDATE LRU
|
||||
Changed set 15: 100064 - - -
|
||||
# 64 : Read 400191f0
|
||||
L1 Read: 400191f0(tag 100064, index 15)
|
||||
Current set 15: 100064 - - -
|
||||
L1 HIT
|
||||
L1 UPDATE LRU
|
||||
Changed set 15: 100064 - - -
|
||||
# 65 : Read 400191f0
|
||||
L1 Read: 400191f0(tag 100064, index 15)
|
||||
Current set 15: 100064 - - -
|
||||
L1 HIT
|
||||
L1 UPDATE LRU
|
||||
Changed set 15: 100064 - - -
|
||||
# 66 : Read 4000d620
|
||||
L1 Read: 4000d620(tag 100035, index 17)
|
||||
Current set 17: 100035 - - -
|
||||
L1 HIT
|
||||
L1 UPDATE LRU
|
||||
Changed set 17: 100035 - - -
|
||||
# 67 : Read 400191f0
|
||||
L1 Read: 400191f0(tag 100064, index 15)
|
||||
Current set 15: 100064 - - -
|
||||
L1 HIT
|
||||
L1 UPDATE LRU
|
||||
Changed set 15: 100064 - - -
|
||||
# 68 : Read 4000b517
|
||||
L1 Read: 4000b517(tag 10002d, index 8)
|
||||
Current set 8: 100035 10002d - -
|
||||
L1 HIT
|
||||
L1 UPDATE LRU
|
||||
Changed set 8: 100035 10002d - -
|
||||
# 69 : Read 400191f0
|
||||
L1 Read: 400191f0(tag 100064, index 15)
|
||||
Current set 15: 100064 - - -
|
||||
L1 HIT
|
||||
L1 UPDATE LRU
|
||||
Changed set 15: 100064 - - -
|
||||
# 70 : Read 400191f0
|
||||
L1 Read: 400191f0(tag 100064, index 15)
|
||||
Current set 15: 100064 - - -
|
||||
L1 HIT
|
||||
L1 UPDATE LRU
|
||||
Changed set 15: 100064 - - -
|
||||
# 71 : Read 400191f1
|
||||
L1 Read: 400191f1(tag 100064, index 15)
|
||||
Current set 15: 100064 - - -
|
||||
L1 HIT
|
||||
L1 UPDATE LRU
|
||||
Changed set 15: 100064 - - -
|
||||
# 72 : Read 400191f1
|
||||
L1 Read: 400191f1(tag 100064, index 15)
|
||||
Current set 15: 100064 - - -
|
||||
L1 HIT
|
||||
L1 UPDATE LRU
|
||||
Changed set 15: 100064 - - -
|
||||
# 73 : Read 400191f2
|
||||
L1 Read: 400191f2(tag 100064, index 15)
|
||||
Current set 15: 100064 - - -
|
||||
L1 HIT
|
||||
L1 UPDATE LRU
|
||||
Changed set 15: 100064 - - -
|
||||
# 74 : Read 400191f2
|
||||
L1 Read: 400191f2(tag 100064, index 15)
|
||||
Current set 15: 100064 - - -
|
||||
L1 HIT
|
||||
L1 UPDATE LRU
|
||||
Changed set 15: 100064 - - -
|
||||
# 75 : Read 400191f3
|
||||
L1 Read: 400191f3(tag 100064, index 15)
|
||||
Current set 15: 100064 - - -
|
||||
L1 HIT
|
||||
L1 UPDATE LRU
|
||||
Changed set 15: 100064 - - -
|
||||
# 76 : Read 400191f3
|
||||
L1 Read: 400191f3(tag 100064, index 15)
|
||||
Current set 15: 100064 - - -
|
||||
L1 HIT
|
||||
L1 UPDATE LRU
|
||||
Changed set 15: 100064 - - -
|
||||
# 77 : Read 400191f4
|
||||
L1 Read: 400191f4(tag 100064, index 15)
|
||||
Current set 15: 100064 - - -
|
||||
L1 HIT
|
||||
L1 UPDATE LRU
|
||||
Changed set 15: 100064 - - -
|
||||
# 78 : Read 400191f4
|
||||
L1 Read: 400191f4(tag 100064, index 15)
|
||||
Current set 15: 100064 - - -
|
||||
L1 HIT
|
||||
L1 UPDATE LRU
|
||||
Changed set 15: 100064 - - -
|
||||
# 79 : Read 400191f5
|
||||
L1 Read: 400191f5(tag 100064, index 15)
|
||||
Current set 15: 100064 - - -
|
||||
L1 HIT
|
||||
L1 UPDATE LRU
|
||||
Changed set 15: 100064 - - -
|
||||
# 80 : Read 4000d624
|
||||
L1 Read: 4000d624(tag 100035, index 17)
|
||||
Current set 17: 100035 - - -
|
||||
L1 HIT
|
||||
L1 UPDATE LRU
|
||||
Changed set 17: 100035 - - -
|
||||
# 81 : Read 4000b8a3
|
||||
L1 Read: 4000b8a3(tag 10002e, index 5)
|
||||
Current set 5: 100058 10002e - -
|
||||
L1 HIT
|
||||
L1 UPDATE LRU
|
||||
Changed set 5: 100058 10002e - -
|
||||
# 82 : Read 4000d45c
|
||||
L1 Read: 4000d45c(tag 100035, index 2)
|
||||
Current set 2: 100035 10002e - -
|
||||
L1 HIT
|
||||
L1 UPDATE LRU
|
||||
Changed set 2: 100035 10002e - -
|
||||
# 83 : Read 40013c38
|
||||
L1 Read: 40013c38(tag 10004f, index 1)
|
||||
Current set 1: - - - -
|
||||
L1 MISS
|
||||
L1 UPDATE LRU
|
||||
Changed set 1: 10004f - - -
|
||||
# 84 : Read 4001b438
|
||||
L1 Read: 4001b438(tag 10006d, index 1)
|
||||
Current set 1: 10004f - - -
|
||||
L1 MISS
|
||||
L1 UPDATE LRU
|
||||
Changed set 1: 10004f 10006d - -
|
||||
# 85 : Read 4001b458
|
||||
L1 Read: 4001b458(tag 10006d, index 2)
|
||||
Current set 2: 100035 10002e - -
|
||||
L1 MISS
|
||||
L1 UPDATE LRU
|
||||
Changed set 2: 100035 10002e 10006d -
|
||||
# 86 : Read 400191f0
|
||||
L1 Read: 400191f0(tag 100064, index 15)
|
||||
Current set 15: 100064 - - -
|
||||
L1 HIT
|
||||
L1 UPDATE LRU
|
||||
Changed set 15: 100064 - - -
|
||||
# 87 : Read 400191f1
|
||||
L1 Read: 400191f1(tag 100064, index 15)
|
||||
Current set 15: 100064 - - -
|
||||
L1 HIT
|
||||
L1 UPDATE LRU
|
||||
Changed set 15: 100064 - - -
|
||||
# 88 : Read 400191f4
|
||||
L1 Read: 400191f4(tag 100064, index 15)
|
||||
Current set 15: 100064 - - -
|
||||
L1 HIT
|
||||
L1 UPDATE LRU
|
||||
Changed set 15: 100064 - - -
|
||||
# 89 : Read 4001b438
|
||||
L1 Read: 4001b438(tag 10006d, index 1)
|
||||
Current set 1: 10004f 10006d - -
|
||||
L1 HIT
|
||||
L1 UPDATE LRU
|
||||
Changed set 1: 10004f 10006d - -
|
||||
# 90 : Read 4001b43c
|
||||
L1 Read: 4001b43c(tag 10006d, index 1)
|
||||
Current set 1: 10004f 10006d - -
|
||||
L1 HIT
|
||||
L1 UPDATE LRU
|
||||
Changed set 1: 10004f 10006d - -
|
||||
# 91 : Read 4001b638
|
||||
L1 Read: 4001b638(tag 10006d, index 17)
|
||||
Current set 17: 100035 - - -
|
||||
L1 MISS
|
||||
L1 UPDATE LRU
|
||||
Changed set 17: 100035 10006d - -
|
||||
# 92 : Read 4000d4b8
|
||||
L1 Read: 4000d4b8(tag 100035, index 5)
|
||||
Current set 5: 100058 10002e - -
|
||||
L1 MISS
|
||||
L1 UPDATE LRU
|
||||
Changed set 5: 100058 10002e 100035 -
|
||||
# 93 : Write 7b033c74
|
||||
L1 Write: 7b033c74(tag 1ec0cf, index 3)
|
||||
Current set 3: - - - -
|
||||
L1 MISS, WRITE THROUGH
|
||||
Changed set 3: - - - -
|
||||
# 94 : Read 7b033c74
|
||||
L1 Read: 7b033c74(tag 1ec0cf, index 3)
|
||||
Current set 3: - - - -
|
||||
L1 MISS
|
||||
L1 UPDATE LRU
|
||||
Changed set 3: 1ec0cf - - -
|
||||
# 95 : Read 4001b438
|
||||
L1 Read: 4001b438(tag 10006d, index 1)
|
||||
Current set 1: 10004f 10006d - -
|
||||
L1 HIT
|
||||
L1 UPDATE LRU
|
||||
Changed set 1: 10004f 10006d - -
|
||||
# 96 : Read 4001b438
|
||||
L1 Read: 4001b438(tag 10006d, index 1)
|
||||
Current set 1: 10004f 10006d - -
|
||||
L1 HIT
|
||||
L1 UPDATE LRU
|
||||
Changed set 1: 10004f 10006d - -
|
||||
# 97 : Read 4001b43c
|
||||
L1 Read: 4001b43c(tag 10006d, index 1)
|
||||
Current set 1: 10004f 10006d - -
|
||||
L1 HIT
|
||||
L1 UPDATE LRU
|
||||
Changed set 1: 10004f 10006d - -
|
||||
# 98 : Read 4001b638
|
||||
L1 Read: 4001b638(tag 10006d, index 17)
|
||||
Current set 17: 100035 10006d - -
|
||||
L1 HIT
|
||||
L1 UPDATE LRU
|
||||
Changed set 17: 100035 10006d - -
|
||||
# 99 : Write 4001f550
|
||||
L1 Write: 4001f550(tag 10007d, index 10)
|
||||
Current set 10: 100035 - - -
|
||||
L1 MISS, WRITE THROUGH
|
||||
Changed set 10: 100035 - - -
|
||||
# 100 : Write 4001f60d
|
||||
L1 Write: 4001f60d(tag 10007d, index 16)
|
||||
Current set 16: - - - -
|
||||
L1 MISS, WRITE THROUGH
|
||||
Changed set 16: - - - -
|
||||
|
|
@ -0,0 +1,619 @@
|
|||
# 1 : Write 400341a0
|
||||
L1 Write: 400341a0(tag 40034, index 6)
|
||||
Current set 6: - -
|
||||
L1 MISS
|
||||
Count_Block Update
|
||||
L1 SET DIRTY
|
||||
Changed set 6: 40034 D -
|
||||
# 2 : Read dfcfa8
|
||||
L1 Read: dfcfa8(tag dfc, index 62)
|
||||
Current set 62: - -
|
||||
L1 MISS
|
||||
Count_Block Update
|
||||
Changed set 62: dfc -
|
||||
# 3 : Write 7b034dd4
|
||||
L1 Write: 7b034dd4(tag 7b034, index 55)
|
||||
Current set 55: - -
|
||||
L1 MISS
|
||||
Count_Block Update
|
||||
L1 SET DIRTY
|
||||
Changed set 55: 7b034 D -
|
||||
# 4 : Read df7c48
|
||||
L1 Read: df7c48(tag df7, index 49)
|
||||
Current set 49: - -
|
||||
L1 MISS
|
||||
Count_Block Update
|
||||
Changed set 49: df7 -
|
||||
# 5 : Read 7b034dd4
|
||||
L1 Read: 7b034dd4(tag 7b034, index 55)
|
||||
Current set 55: 7b034 D -
|
||||
L1 HIT
|
||||
Count_Block Update
|
||||
Changed set 55: 7b034 D -
|
||||
# 6 : Read 423aebbc
|
||||
L1 Read: 423aebbc(tag 423ae, index 46)
|
||||
Current set 46: - -
|
||||
L1 MISS
|
||||
Count_Block Update
|
||||
Changed set 46: 423ae -
|
||||
# 7 : Read 423aebb8
|
||||
L1 Read: 423aebb8(tag 423ae, index 46)
|
||||
Current set 46: 423ae -
|
||||
L1 HIT
|
||||
Count_Block Update
|
||||
Changed set 46: 423ae -
|
||||
# 8 : Read 423aebbc
|
||||
L1 Read: 423aebbc(tag 423ae, index 46)
|
||||
Current set 46: 423ae -
|
||||
L1 HIT
|
||||
Count_Block Update
|
||||
Changed set 46: 423ae -
|
||||
# 9 : Read 40002634
|
||||
L1 Read: 40002634(tag 40002, index 24)
|
||||
Current set 24: - -
|
||||
L1 MISS
|
||||
Count_Block Update
|
||||
Changed set 24: 40002 -
|
||||
# 10 : Write 40139dd0
|
||||
L1 Write: 40139dd0(tag 40139, index 55)
|
||||
Current set 55: 7b034 D -
|
||||
L1 MISS
|
||||
Count_Block Update
|
||||
L1 SET DIRTY
|
||||
Changed set 55: 7b034 D 40139 D
|
||||
# 11 : Read 423aeb9c
|
||||
L1 Read: 423aeb9c(tag 423ae, index 46)
|
||||
Current set 46: 423ae -
|
||||
L1 HIT
|
||||
Count_Block Update
|
||||
Changed set 46: 423ae -
|
||||
# 12 : Write 40139dd4
|
||||
L1 Write: 40139dd4(tag 40139, index 55)
|
||||
Current set 55: 7b034 D 40139 D
|
||||
L1 HIT
|
||||
Count_Block Update
|
||||
L1 SET DIRTY
|
||||
Changed set 55: 7b034 D 40139 D
|
||||
# 13 : Write 40138938
|
||||
L1 Write: 40138938(tag 40138, index 36)
|
||||
Current set 36: - -
|
||||
L1 MISS
|
||||
Count_Block Update
|
||||
L1 SET DIRTY
|
||||
Changed set 36: 40138 D -
|
||||
# 14 : Read 423aeba0
|
||||
L1 Read: 423aeba0(tag 423ae, index 46)
|
||||
Current set 46: 423ae -
|
||||
L1 HIT
|
||||
Count_Block Update
|
||||
Changed set 46: 423ae -
|
||||
# 15 : Write 4013893c
|
||||
L1 Write: 4013893c(tag 40138, index 36)
|
||||
Current set 36: 40138 D -
|
||||
L1 HIT
|
||||
Count_Block Update
|
||||
L1 SET DIRTY
|
||||
Changed set 36: 40138 D -
|
||||
# 16 : Read 7b034dcc
|
||||
L1 Read: 7b034dcc(tag 7b034, index 55)
|
||||
Current set 55: 7b034 D 40139 D
|
||||
L1 HIT
|
||||
Count_Block Update
|
||||
Changed set 55: 7b034 D 40139 D
|
||||
# 17 : Read df8a70
|
||||
L1 Read: df8a70(tag df8, index 41)
|
||||
Current set 41: - -
|
||||
L1 MISS
|
||||
Count_Block Update
|
||||
Changed set 41: df8 -
|
||||
# 18 : Write 7b034c50
|
||||
L1 Write: 7b034c50(tag 7b034, index 49)
|
||||
Current set 49: df7 -
|
||||
L1 MISS
|
||||
Count_Block Update
|
||||
L1 SET DIRTY
|
||||
Changed set 49: df7 7b034 D
|
||||
# 19 : Write 7b034c68
|
||||
L1 Write: 7b034c68(tag 7b034, index 49)
|
||||
Current set 49: df7 7b034 D
|
||||
L1 HIT
|
||||
Count_Block Update
|
||||
L1 SET DIRTY
|
||||
Changed set 49: df7 7b034 D
|
||||
# 20 : Read df9f10
|
||||
L1 Read: df9f10(tag df9, index 60)
|
||||
Current set 60: - -
|
||||
L1 MISS
|
||||
Count_Block Update
|
||||
Changed set 60: df9 -
|
||||
# 21 : Write 7b034da8
|
||||
L1 Write: 7b034da8(tag 7b034, index 54)
|
||||
Current set 54: - -
|
||||
L1 MISS
|
||||
Count_Block Update
|
||||
L1 SET DIRTY
|
||||
Changed set 54: 7b034 D -
|
||||
# 22 : Read 7b034dcc
|
||||
L1 Read: 7b034dcc(tag 7b034, index 55)
|
||||
Current set 55: 7b034 D 40139 D
|
||||
L1 HIT
|
||||
Count_Block Update
|
||||
Changed set 55: 7b034 D 40139 D
|
||||
# 23 : Read df8a74
|
||||
L1 Read: df8a74(tag df8, index 41)
|
||||
Current set 41: df8 -
|
||||
L1 HIT
|
||||
Count_Block Update
|
||||
Changed set 41: df8 -
|
||||
# 24 : Write 7b034c54
|
||||
L1 Write: 7b034c54(tag 7b034, index 49)
|
||||
Current set 49: df7 7b034 D
|
||||
L1 HIT
|
||||
Count_Block Update
|
||||
L1 SET DIRTY
|
||||
Changed set 49: df7 7b034 D
|
||||
# 25 : Write 7b034c6c
|
||||
L1 Write: 7b034c6c(tag 7b034, index 49)
|
||||
Current set 49: df7 7b034 D
|
||||
L1 HIT
|
||||
Count_Block Update
|
||||
L1 SET DIRTY
|
||||
Changed set 49: df7 7b034 D
|
||||
# 26 : Read df9f14
|
||||
L1 Read: df9f14(tag df9, index 60)
|
||||
Current set 60: df9 -
|
||||
L1 HIT
|
||||
Count_Block Update
|
||||
Changed set 60: df9 -
|
||||
# 27 : Write 7b034dac
|
||||
L1 Write: 7b034dac(tag 7b034, index 54)
|
||||
Current set 54: 7b034 D -
|
||||
L1 HIT
|
||||
Count_Block Update
|
||||
L1 SET DIRTY
|
||||
Changed set 54: 7b034 D -
|
||||
# 28 : Read 40138938
|
||||
L1 Read: 40138938(tag 40138, index 36)
|
||||
Current set 36: 40138 D -
|
||||
L1 HIT
|
||||
Count_Block Update
|
||||
Changed set 36: 40138 D -
|
||||
# 29 : Write 7b034d90
|
||||
L1 Write: 7b034d90(tag 7b034, index 54)
|
||||
Current set 54: 7b034 D -
|
||||
L1 HIT
|
||||
Count_Block Update
|
||||
L1 SET DIRTY
|
||||
Changed set 54: 7b034 D -
|
||||
# 30 : Read 7b034c68
|
||||
L1 Read: 7b034c68(tag 7b034, index 49)
|
||||
Current set 49: df7 7b034 D
|
||||
L1 HIT
|
||||
Count_Block Update
|
||||
Changed set 49: df7 7b034 D
|
||||
# 31 : Read df84d4
|
||||
L1 Read: df84d4(tag df8, index 19)
|
||||
Current set 19: - -
|
||||
L1 MISS
|
||||
Count_Block Update
|
||||
Changed set 19: df8 -
|
||||
# 32 : Read df84d5
|
||||
L1 Read: df84d5(tag df8, index 19)
|
||||
Current set 19: df8 -
|
||||
L1 HIT
|
||||
Count_Block Update
|
||||
Changed set 19: df8 -
|
||||
# 33 : Read df84d6
|
||||
L1 Read: df84d6(tag df8, index 19)
|
||||
Current set 19: df8 -
|
||||
L1 HIT
|
||||
Count_Block Update
|
||||
Changed set 19: df8 -
|
||||
# 34 : Read df84d7
|
||||
L1 Read: df84d7(tag df8, index 19)
|
||||
Current set 19: df8 -
|
||||
L1 HIT
|
||||
Count_Block Update
|
||||
Changed set 19: df8 -
|
||||
# 35 : Read df84d8
|
||||
L1 Read: df84d8(tag df8, index 19)
|
||||
Current set 19: df8 -
|
||||
L1 HIT
|
||||
Count_Block Update
|
||||
Changed set 19: df8 -
|
||||
# 36 : Read df84d9
|
||||
L1 Read: df84d9(tag df8, index 19)
|
||||
Current set 19: df8 -
|
||||
L1 HIT
|
||||
Count_Block Update
|
||||
Changed set 19: df8 -
|
||||
# 37 : Read df84da
|
||||
L1 Read: df84da(tag df8, index 19)
|
||||
Current set 19: df8 -
|
||||
L1 HIT
|
||||
Count_Block Update
|
||||
Changed set 19: df8 -
|
||||
# 38 : Read df84db
|
||||
L1 Read: df84db(tag df8, index 19)
|
||||
Current set 19: df8 -
|
||||
L1 HIT
|
||||
Count_Block Update
|
||||
Changed set 19: df8 -
|
||||
# 39 : Read df84dc
|
||||
L1 Read: df84dc(tag df8, index 19)
|
||||
Current set 19: df8 -
|
||||
L1 HIT
|
||||
Count_Block Update
|
||||
Changed set 19: df8 -
|
||||
# 40 : Read df84dd
|
||||
L1 Read: df84dd(tag df8, index 19)
|
||||
Current set 19: df8 -
|
||||
L1 HIT
|
||||
Count_Block Update
|
||||
Changed set 19: df8 -
|
||||
# 41 : Read df84de
|
||||
L1 Read: df84de(tag df8, index 19)
|
||||
Current set 19: df8 -
|
||||
L1 HIT
|
||||
Count_Block Update
|
||||
Changed set 19: df8 -
|
||||
# 42 : Read df84df
|
||||
L1 Read: df84df(tag df8, index 19)
|
||||
Current set 19: df8 -
|
||||
L1 HIT
|
||||
Count_Block Update
|
||||
Changed set 19: df8 -
|
||||
# 43 : Read df84e0
|
||||
L1 Read: df84e0(tag df8, index 19)
|
||||
Current set 19: df8 -
|
||||
L1 HIT
|
||||
Count_Block Update
|
||||
Changed set 19: df8 -
|
||||
# 44 : Read df84e1
|
||||
L1 Read: df84e1(tag df8, index 19)
|
||||
Current set 19: df8 -
|
||||
L1 HIT
|
||||
Count_Block Update
|
||||
Changed set 19: df8 -
|
||||
# 45 : Read df84e2
|
||||
L1 Read: df84e2(tag df8, index 19)
|
||||
Current set 19: df8 -
|
||||
L1 HIT
|
||||
Count_Block Update
|
||||
Changed set 19: df8 -
|
||||
# 46 : Read df84e3
|
||||
L1 Read: df84e3(tag df8, index 19)
|
||||
Current set 19: df8 -
|
||||
L1 HIT
|
||||
Count_Block Update
|
||||
Changed set 19: df8 -
|
||||
# 47 : Read 4013893c
|
||||
L1 Read: 4013893c(tag 40138, index 36)
|
||||
Current set 36: 40138 D -
|
||||
L1 HIT
|
||||
Count_Block Update
|
||||
Changed set 36: 40138 D -
|
||||
# 48 : Write 7b034d94
|
||||
L1 Write: 7b034d94(tag 7b034, index 54)
|
||||
Current set 54: 7b034 D -
|
||||
L1 HIT
|
||||
Count_Block Update
|
||||
L1 SET DIRTY
|
||||
Changed set 54: 7b034 D -
|
||||
# 49 : Read 7b034c6c
|
||||
L1 Read: 7b034c6c(tag 7b034, index 49)
|
||||
Current set 49: df7 7b034 D
|
||||
L1 HIT
|
||||
Count_Block Update
|
||||
Changed set 49: df7 7b034 D
|
||||
# 50 : Read df84e4
|
||||
L1 Read: df84e4(tag df8, index 19)
|
||||
Current set 19: df8 -
|
||||
L1 HIT
|
||||
Count_Block Update
|
||||
Changed set 19: df8 -
|
||||
# 51 : Read df84e5
|
||||
L1 Read: df84e5(tag df8, index 19)
|
||||
Current set 19: df8 -
|
||||
L1 HIT
|
||||
Count_Block Update
|
||||
Changed set 19: df8 -
|
||||
# 52 : Read df84e6
|
||||
L1 Read: df84e6(tag df8, index 19)
|
||||
Current set 19: df8 -
|
||||
L1 HIT
|
||||
Count_Block Update
|
||||
Changed set 19: df8 -
|
||||
# 53 : Read df84e7
|
||||
L1 Read: df84e7(tag df8, index 19)
|
||||
Current set 19: df8 -
|
||||
L1 HIT
|
||||
Count_Block Update
|
||||
Changed set 19: df8 -
|
||||
# 54 : Read df84e8
|
||||
L1 Read: df84e8(tag df8, index 19)
|
||||
Current set 19: df8 -
|
||||
L1 HIT
|
||||
Count_Block Update
|
||||
Changed set 19: df8 -
|
||||
# 55 : Read df84e9
|
||||
L1 Read: df84e9(tag df8, index 19)
|
||||
Current set 19: df8 -
|
||||
L1 HIT
|
||||
Count_Block Update
|
||||
Changed set 19: df8 -
|
||||
# 56 : Read df84ea
|
||||
L1 Read: df84ea(tag df8, index 19)
|
||||
Current set 19: df8 -
|
||||
L1 HIT
|
||||
Count_Block Update
|
||||
Changed set 19: df8 -
|
||||
# 57 : Read df84eb
|
||||
L1 Read: df84eb(tag df8, index 19)
|
||||
Current set 19: df8 -
|
||||
L1 HIT
|
||||
Count_Block Update
|
||||
Changed set 19: df8 -
|
||||
# 58 : Read df84ec
|
||||
L1 Read: df84ec(tag df8, index 19)
|
||||
Current set 19: df8 -
|
||||
L1 HIT
|
||||
Count_Block Update
|
||||
Changed set 19: df8 -
|
||||
# 59 : Read df84ed
|
||||
L1 Read: df84ed(tag df8, index 19)
|
||||
Current set 19: df8 -
|
||||
L1 HIT
|
||||
Count_Block Update
|
||||
Changed set 19: df8 -
|
||||
# 60 : Read df84ee
|
||||
L1 Read: df84ee(tag df8, index 19)
|
||||
Current set 19: df8 -
|
||||
L1 HIT
|
||||
Count_Block Update
|
||||
Changed set 19: df8 -
|
||||
# 61 : Read df84ef
|
||||
L1 Read: df84ef(tag df8, index 19)
|
||||
Current set 19: df8 -
|
||||
L1 HIT
|
||||
Count_Block Update
|
||||
Changed set 19: df8 -
|
||||
# 62 : Read df84f0
|
||||
L1 Read: df84f0(tag df8, index 19)
|
||||
Current set 19: df8 -
|
||||
L1 HIT
|
||||
Count_Block Update
|
||||
Changed set 19: df8 -
|
||||
# 63 : Read df84f1
|
||||
L1 Read: df84f1(tag df8, index 19)
|
||||
Current set 19: df8 -
|
||||
L1 HIT
|
||||
Count_Block Update
|
||||
Changed set 19: df8 -
|
||||
# 64 : Read df84f2
|
||||
L1 Read: df84f2(tag df8, index 19)
|
||||
Current set 19: df8 -
|
||||
L1 HIT
|
||||
Count_Block Update
|
||||
Changed set 19: df8 -
|
||||
# 65 : Read df84f3
|
||||
L1 Read: df84f3(tag df8, index 19)
|
||||
Current set 19: df8 -
|
||||
L1 HIT
|
||||
Count_Block Update
|
||||
Changed set 19: df8 -
|
||||
# 66 : Read df84f4
|
||||
L1 Read: df84f4(tag df8, index 19)
|
||||
Current set 19: df8 -
|
||||
L1 HIT
|
||||
Count_Block Update
|
||||
Changed set 19: df8 -
|
||||
# 67 : Read df84f5
|
||||
L1 Read: df84f5(tag df8, index 19)
|
||||
Current set 19: df8 -
|
||||
L1 HIT
|
||||
Count_Block Update
|
||||
Changed set 19: df8 -
|
||||
# 68 : Read 40138938
|
||||
L1 Read: 40138938(tag 40138, index 36)
|
||||
Current set 36: 40138 D -
|
||||
L1 HIT
|
||||
Count_Block Update
|
||||
Changed set 36: 40138 D -
|
||||
# 69 : Read 423aeb90
|
||||
L1 Read: 423aeb90(tag 423ae, index 46)
|
||||
Current set 46: 423ae -
|
||||
L1 HIT
|
||||
Count_Block Update
|
||||
Changed set 46: 423ae -
|
||||
# 70 : Write 7b034d58
|
||||
L1 Write: 7b034d58(tag 7b034, index 53)
|
||||
Current set 53: - -
|
||||
L1 MISS
|
||||
Count_Block Update
|
||||
L1 SET DIRTY
|
||||
Changed set 53: 7b034 D -
|
||||
# 71 : Write 7b034c80
|
||||
L1 Write: 7b034c80(tag 7b034, index 50)
|
||||
Current set 50: - -
|
||||
L1 MISS
|
||||
Count_Block Update
|
||||
L1 SET DIRTY
|
||||
Changed set 50: 7b034 D -
|
||||
# 72 : Read 7b034c68
|
||||
L1 Read: 7b034c68(tag 7b034, index 49)
|
||||
Current set 49: df7 7b034 D
|
||||
L1 HIT
|
||||
Count_Block Update
|
||||
Changed set 49: df7 7b034 D
|
||||
# 73 : Read df84d4
|
||||
L1 Read: df84d4(tag df8, index 19)
|
||||
Current set 19: df8 -
|
||||
L1 HIT
|
||||
Count_Block Update
|
||||
Changed set 19: df8 -
|
||||
# 74 : Read 40138938
|
||||
L1 Read: 40138938(tag 40138, index 36)
|
||||
Current set 36: 40138 D -
|
||||
L1 HIT
|
||||
Count_Block Update
|
||||
Changed set 36: 40138 D -
|
||||
# 75 : Read 40139dd0
|
||||
L1 Read: 40139dd0(tag 40139, index 55)
|
||||
Current set 55: 7b034 D 40139 D
|
||||
L1 HIT
|
||||
Count_Block Update
|
||||
Changed set 55: 7b034 D 40139 D
|
||||
# 76 : Read 423aeb92
|
||||
L1 Read: 423aeb92(tag 423ae, index 46)
|
||||
Current set 46: 423ae -
|
||||
L1 HIT
|
||||
Count_Block Update
|
||||
Changed set 46: 423ae -
|
||||
# 77 : Read 423aeb94
|
||||
L1 Read: 423aeb94(tag 423ae, index 46)
|
||||
Current set 46: 423ae -
|
||||
L1 HIT
|
||||
Count_Block Update
|
||||
Changed set 46: 423ae -
|
||||
# 78 : Read 423aeb88
|
||||
L1 Read: 423aeb88(tag 423ae, index 46)
|
||||
Current set 46: 423ae -
|
||||
L1 HIT
|
||||
Count_Block Update
|
||||
Changed set 46: 423ae -
|
||||
# 79 : Read 423aeb88
|
||||
L1 Read: 423aeb88(tag 423ae, index 46)
|
||||
Current set 46: 423ae -
|
||||
L1 HIT
|
||||
Count_Block Update
|
||||
Changed set 46: 423ae -
|
||||
# 80 : Read 423aeb88
|
||||
L1 Read: 423aeb88(tag 423ae, index 46)
|
||||
Current set 46: 423ae -
|
||||
L1 HIT
|
||||
Count_Block Update
|
||||
Changed set 46: 423ae -
|
||||
# 81 : Read 423aeb88
|
||||
L1 Read: 423aeb88(tag 423ae, index 46)
|
||||
Current set 46: 423ae -
|
||||
L1 HIT
|
||||
Count_Block Update
|
||||
Changed set 46: 423ae -
|
||||
# 82 : Read 423aeb8c
|
||||
L1 Read: 423aeb8c(tag 423ae, index 46)
|
||||
Current set 46: 423ae -
|
||||
L1 HIT
|
||||
Count_Block Update
|
||||
Changed set 46: 423ae -
|
||||
# 83 : Read 42351e38
|
||||
L1 Read: 42351e38(tag 42351, index 56)
|
||||
Current set 56: - -
|
||||
L1 MISS
|
||||
Count_Block Update
|
||||
Changed set 56: 42351 -
|
||||
# 84 : Read 42351e3c
|
||||
L1 Read: 42351e3c(tag 42351, index 56)
|
||||
Current set 56: 42351 -
|
||||
L1 HIT
|
||||
Count_Block Update
|
||||
Changed set 56: 42351 -
|
||||
# 85 : Read 423aeb88
|
||||
L1 Read: 423aeb88(tag 423ae, index 46)
|
||||
Current set 46: 423ae -
|
||||
L1 HIT
|
||||
Count_Block Update
|
||||
Changed set 46: 423ae -
|
||||
# 86 : Write 40022e80
|
||||
L1 Write: 40022e80(tag 40022, index 58)
|
||||
Current set 58: - -
|
||||
L1 MISS
|
||||
Count_Block Update
|
||||
L1 SET DIRTY
|
||||
Changed set 58: 40022 D -
|
||||
# 87 : Read 423aeb88
|
||||
L1 Read: 423aeb88(tag 423ae, index 46)
|
||||
Current set 46: 423ae -
|
||||
L1 HIT
|
||||
Count_Block Update
|
||||
Changed set 46: 423ae -
|
||||
# 88 : Read 4214c9d4
|
||||
L1 Read: 4214c9d4(tag 4214c, index 39)
|
||||
Current set 39: - -
|
||||
L1 MISS
|
||||
Count_Block Update
|
||||
Changed set 39: 4214c -
|
||||
# 89 : Read 40002178
|
||||
L1 Read: 40002178(tag 40002, index 5)
|
||||
Current set 5: - -
|
||||
L1 MISS
|
||||
Count_Block Update
|
||||
Changed set 5: 40002 -
|
||||
# 90 : Read 384130
|
||||
L1 Read: 384130(tag 384, index 4)
|
||||
Current set 4: - -
|
||||
L1 MISS
|
||||
Count_Block Update
|
||||
Changed set 4: 384 -
|
||||
# 91 : Read 423aeb8c
|
||||
L1 Read: 423aeb8c(tag 423ae, index 46)
|
||||
Current set 46: 423ae -
|
||||
L1 HIT
|
||||
Count_Block Update
|
||||
Changed set 46: 423ae -
|
||||
# 92 : Read 42351e38
|
||||
L1 Read: 42351e38(tag 42351, index 56)
|
||||
Current set 56: 42351 -
|
||||
L1 HIT
|
||||
Count_Block Update
|
||||
Changed set 56: 42351 -
|
||||
# 93 : Read 42351e3c
|
||||
L1 Read: 42351e3c(tag 42351, index 56)
|
||||
Current set 56: 42351 -
|
||||
L1 HIT
|
||||
Count_Block Update
|
||||
Changed set 56: 42351 -
|
||||
# 94 : Read 401367d0
|
||||
L1 Read: 401367d0(tag 40136, index 31)
|
||||
Current set 31: - -
|
||||
L1 MISS
|
||||
Count_Block Update
|
||||
Changed set 31: 40136 -
|
||||
# 95 : Read 7b0345e4
|
||||
L1 Read: 7b0345e4(tag 7b034, index 23)
|
||||
Current set 23: - -
|
||||
L1 MISS
|
||||
Count_Block Update
|
||||
Changed set 23: 7b034 -
|
||||
# 96 : Write 423aeb8c
|
||||
L1 Write: 423aeb8c(tag 423ae, index 46)
|
||||
Current set 46: 423ae -
|
||||
L1 HIT
|
||||
Count_Block Update
|
||||
L1 SET DIRTY
|
||||
Changed set 46: 423ae D -
|
||||
# 97 : Write 423aeb94
|
||||
L1 Write: 423aeb94(tag 423ae, index 46)
|
||||
Current set 46: 423ae D -
|
||||
L1 HIT
|
||||
Count_Block Update
|
||||
L1 SET DIRTY
|
||||
Changed set 46: 423ae D -
|
||||
# 98 : Read 40022e80
|
||||
L1 Read: 40022e80(tag 40022, index 58)
|
||||
Current set 58: 40022 D -
|
||||
L1 HIT
|
||||
Count_Block Update
|
||||
Changed set 58: 40022 D -
|
||||
# 99 : Read 40139dd0
|
||||
L1 Read: 40139dd0(tag 40139, index 55)
|
||||
Current set 55: 7b034 D 40139 D
|
||||
L1 HIT
|
||||
Count_Block Update
|
||||
Changed set 55: 7b034 D 40139 D
|
||||
# 100 : Read 423aeb9c
|
||||
L1 Read: 423aeb9c(tag 423ae, index 46)
|
||||
Current set 46: 423ae D -
|
||||
L1 HIT
|
||||
Count_Block Update
|
||||
Changed set 46: 423ae D -
|
||||
|
|
@ -0,0 +1,555 @@
|
|||
# 1 : Read 40012998
|
||||
L1 Read: 40012998(tag 400129, index 4)
|
||||
Current set 4: - - - -
|
||||
L1 MISS
|
||||
Count_Block Update
|
||||
Changed set 4: 400129 - - -
|
||||
# 2 : Read 40012988
|
||||
L1 Read: 40012988(tag 400129, index 4)
|
||||
Current set 4: 400129 - - -
|
||||
L1 HIT
|
||||
Count_Block Update
|
||||
Changed set 4: 400129 - - -
|
||||
# 3 : Read 4008b390
|
||||
L1 Read: 4008b390(tag 4008b3, index 4)
|
||||
Current set 4: 400129 - - -
|
||||
L1 MISS
|
||||
Count_Block Update
|
||||
Changed set 4: 400129 4008b3 - -
|
||||
# 4 : Write 4002e84c
|
||||
L1 Write: 4002e84c(tag 4002e8, index 2)
|
||||
Current set 2: - - - -
|
||||
L1 MISS, WRITE THROUGH
|
||||
Changed set 2: - - - -
|
||||
# 5 : Write 4002e850
|
||||
L1 Write: 4002e850(tag 4002e8, index 2)
|
||||
Current set 2: - - - -
|
||||
L1 MISS, WRITE THROUGH
|
||||
Changed set 2: - - - -
|
||||
# 6 : Read 40012988
|
||||
L1 Read: 40012988(tag 400129, index 4)
|
||||
Current set 4: 400129 4008b3 - -
|
||||
L1 HIT
|
||||
Count_Block Update
|
||||
Changed set 4: 400129 4008b3 - -
|
||||
# 7 : Write 4003c200
|
||||
L1 Write: 4003c200(tag 4003c2, index 0)
|
||||
Current set 0: - - - -
|
||||
L1 MISS, WRITE THROUGH
|
||||
Changed set 0: - - - -
|
||||
# 8 : Read 40012988
|
||||
L1 Read: 40012988(tag 400129, index 4)
|
||||
Current set 4: 400129 4008b3 - -
|
||||
L1 HIT
|
||||
Count_Block Update
|
||||
Changed set 4: 400129 4008b3 - -
|
||||
# 9 : Write 40049600
|
||||
L1 Write: 40049600(tag 400496, index 0)
|
||||
Current set 0: - - - -
|
||||
L1 MISS, WRITE THROUGH
|
||||
Changed set 0: - - - -
|
||||
# 10 : Read 40012a00
|
||||
L1 Read: 40012a00(tag 40012a, index 0)
|
||||
Current set 0: - - - -
|
||||
L1 MISS
|
||||
Count_Block Update
|
||||
Changed set 0: 40012a - - -
|
||||
# 11 : Read 4001298c
|
||||
L1 Read: 4001298c(tag 400129, index 4)
|
||||
Current set 4: 400129 4008b3 - -
|
||||
L1 HIT
|
||||
Count_Block Update
|
||||
Changed set 4: 400129 4008b3 - -
|
||||
# 12 : Read 4008b390
|
||||
L1 Read: 4008b390(tag 4008b3, index 4)
|
||||
Current set 4: 400129 4008b3 - -
|
||||
L1 HIT
|
||||
Count_Block Update
|
||||
Changed set 4: 400129 4008b3 - -
|
||||
# 13 : Write 4002e84c
|
||||
L1 Write: 4002e84c(tag 4002e8, index 2)
|
||||
Current set 2: - - - -
|
||||
L1 MISS, WRITE THROUGH
|
||||
Changed set 2: - - - -
|
||||
# 14 : Write 4002e850
|
||||
L1 Write: 4002e850(tag 4002e8, index 2)
|
||||
Current set 2: - - - -
|
||||
L1 MISS, WRITE THROUGH
|
||||
Changed set 2: - - - -
|
||||
# 15 : Read 4001298c
|
||||
L1 Read: 4001298c(tag 400129, index 4)
|
||||
Current set 4: 400129 4008b3 - -
|
||||
L1 HIT
|
||||
Count_Block Update
|
||||
Changed set 4: 400129 4008b3 - -
|
||||
# 16 : Write 4003c204
|
||||
L1 Write: 4003c204(tag 4003c2, index 0)
|
||||
Current set 0: 40012a - - -
|
||||
L1 MISS, WRITE THROUGH
|
||||
Changed set 0: 40012a - - -
|
||||
# 17 : Read 4001298c
|
||||
L1 Read: 4001298c(tag 400129, index 4)
|
||||
Current set 4: 400129 4008b3 - -
|
||||
L1 HIT
|
||||
Count_Block Update
|
||||
Changed set 4: 400129 4008b3 - -
|
||||
# 18 : Write 40049604
|
||||
L1 Write: 40049604(tag 400496, index 0)
|
||||
Current set 0: 40012a - - -
|
||||
L1 MISS, WRITE THROUGH
|
||||
Changed set 0: 40012a - - -
|
||||
# 19 : Read 40012a04
|
||||
L1 Read: 40012a04(tag 40012a, index 0)
|
||||
Current set 0: 40012a - - -
|
||||
L1 HIT
|
||||
Count_Block Update
|
||||
Changed set 0: 40012a - - -
|
||||
# 20 : Read 40012990
|
||||
L1 Read: 40012990(tag 400129, index 4)
|
||||
Current set 4: 400129 4008b3 - -
|
||||
L1 HIT
|
||||
Count_Block Update
|
||||
Changed set 4: 400129 4008b3 - -
|
||||
# 21 : Read 4008b390
|
||||
L1 Read: 4008b390(tag 4008b3, index 4)
|
||||
Current set 4: 400129 4008b3 - -
|
||||
L1 HIT
|
||||
Count_Block Update
|
||||
Changed set 4: 400129 4008b3 - -
|
||||
# 22 : Write 4002e84c
|
||||
L1 Write: 4002e84c(tag 4002e8, index 2)
|
||||
Current set 2: - - - -
|
||||
L1 MISS, WRITE THROUGH
|
||||
Changed set 2: - - - -
|
||||
# 23 : Write 4002e850
|
||||
L1 Write: 4002e850(tag 4002e8, index 2)
|
||||
Current set 2: - - - -
|
||||
L1 MISS, WRITE THROUGH
|
||||
Changed set 2: - - - -
|
||||
# 24 : Read 40012990
|
||||
L1 Read: 40012990(tag 400129, index 4)
|
||||
Current set 4: 400129 4008b3 - -
|
||||
L1 HIT
|
||||
Count_Block Update
|
||||
Changed set 4: 400129 4008b3 - -
|
||||
# 25 : Write 4003c208
|
||||
L1 Write: 4003c208(tag 4003c2, index 0)
|
||||
Current set 0: 40012a - - -
|
||||
L1 MISS, WRITE THROUGH
|
||||
Changed set 0: 40012a - - -
|
||||
# 26 : Read 40012990
|
||||
L1 Read: 40012990(tag 400129, index 4)
|
||||
Current set 4: 400129 4008b3 - -
|
||||
L1 HIT
|
||||
Count_Block Update
|
||||
Changed set 4: 400129 4008b3 - -
|
||||
# 27 : Write 40049608
|
||||
L1 Write: 40049608(tag 400496, index 0)
|
||||
Current set 0: 40012a - - -
|
||||
L1 MISS, WRITE THROUGH
|
||||
Changed set 0: 40012a - - -
|
||||
# 28 : Read 40012a08
|
||||
L1 Read: 40012a08(tag 40012a, index 0)
|
||||
Current set 0: 40012a - - -
|
||||
L1 HIT
|
||||
Count_Block Update
|
||||
Changed set 0: 40012a - - -
|
||||
# 29 : Write 4002e864
|
||||
L1 Write: 4002e864(tag 4002e8, index 3)
|
||||
Current set 3: - - - -
|
||||
L1 MISS, WRITE THROUGH
|
||||
Changed set 3: - - - -
|
||||
# 30 : Read 40012994
|
||||
L1 Read: 40012994(tag 400129, index 4)
|
||||
Current set 4: 400129 4008b3 - -
|
||||
L1 HIT
|
||||
Count_Block Update
|
||||
Changed set 4: 400129 4008b3 - -
|
||||
# 31 : Read 4008b390
|
||||
L1 Read: 4008b390(tag 4008b3, index 4)
|
||||
Current set 4: 400129 4008b3 - -
|
||||
L1 HIT
|
||||
Count_Block Update
|
||||
Changed set 4: 400129 4008b3 - -
|
||||
# 32 : Write 4002e84c
|
||||
L1 Write: 4002e84c(tag 4002e8, index 2)
|
||||
Current set 2: - - - -
|
||||
L1 MISS, WRITE THROUGH
|
||||
Changed set 2: - - - -
|
||||
# 33 : Write 4002e850
|
||||
L1 Write: 4002e850(tag 4002e8, index 2)
|
||||
Current set 2: - - - -
|
||||
L1 MISS, WRITE THROUGH
|
||||
Changed set 2: - - - -
|
||||
# 34 : Read 40012994
|
||||
L1 Read: 40012994(tag 400129, index 4)
|
||||
Current set 4: 400129 4008b3 - -
|
||||
L1 HIT
|
||||
Count_Block Update
|
||||
Changed set 4: 400129 4008b3 - -
|
||||
# 35 : Write 4003c20c
|
||||
L1 Write: 4003c20c(tag 4003c2, index 0)
|
||||
Current set 0: 40012a - - -
|
||||
L1 MISS, WRITE THROUGH
|
||||
Changed set 0: 40012a - - -
|
||||
# 36 : Read 40012994
|
||||
L1 Read: 40012994(tag 400129, index 4)
|
||||
Current set 4: 400129 4008b3 - -
|
||||
L1 HIT
|
||||
Count_Block Update
|
||||
Changed set 4: 400129 4008b3 - -
|
||||
# 37 : Write 4004960c
|
||||
L1 Write: 4004960c(tag 400496, index 0)
|
||||
Current set 0: 40012a - - -
|
||||
L1 MISS, WRITE THROUGH
|
||||
Changed set 0: 40012a - - -
|
||||
# 38 : Read 40012a0c
|
||||
L1 Read: 40012a0c(tag 40012a, index 0)
|
||||
Current set 0: 40012a - - -
|
||||
L1 HIT
|
||||
Count_Block Update
|
||||
Changed set 0: 40012a - - -
|
||||
# 39 : Read 40012998
|
||||
L1 Read: 40012998(tag 400129, index 4)
|
||||
Current set 4: 400129 4008b3 - -
|
||||
L1 HIT
|
||||
Count_Block Update
|
||||
Changed set 4: 400129 4008b3 - -
|
||||
# 40 : Read 4008b390
|
||||
L1 Read: 4008b390(tag 4008b3, index 4)
|
||||
Current set 4: 400129 4008b3 - -
|
||||
L1 HIT
|
||||
Count_Block Update
|
||||
Changed set 4: 400129 4008b3 - -
|
||||
# 41 : Write 4002e84c
|
||||
L1 Write: 4002e84c(tag 4002e8, index 2)
|
||||
Current set 2: - - - -
|
||||
L1 MISS, WRITE THROUGH
|
||||
Changed set 2: - - - -
|
||||
# 42 : Write 4002e850
|
||||
L1 Write: 4002e850(tag 4002e8, index 2)
|
||||
Current set 2: - - - -
|
||||
L1 MISS, WRITE THROUGH
|
||||
Changed set 2: - - - -
|
||||
# 43 : Read 40012998
|
||||
L1 Read: 40012998(tag 400129, index 4)
|
||||
Current set 4: 400129 4008b3 - -
|
||||
L1 HIT
|
||||
Count_Block Update
|
||||
Changed set 4: 400129 4008b3 - -
|
||||
# 44 : Write 4003c210
|
||||
L1 Write: 4003c210(tag 4003c2, index 0)
|
||||
Current set 0: 40012a - - -
|
||||
L1 MISS, WRITE THROUGH
|
||||
Changed set 0: 40012a - - -
|
||||
# 45 : Read 40012998
|
||||
L1 Read: 40012998(tag 400129, index 4)
|
||||
Current set 4: 400129 4008b3 - -
|
||||
L1 HIT
|
||||
Count_Block Update
|
||||
Changed set 4: 400129 4008b3 - -
|
||||
# 46 : Write 40049610
|
||||
L1 Write: 40049610(tag 400496, index 0)
|
||||
Current set 0: 40012a - - -
|
||||
L1 MISS, WRITE THROUGH
|
||||
Changed set 0: 40012a - - -
|
||||
# 47 : Read 40012a10
|
||||
L1 Read: 40012a10(tag 40012a, index 0)
|
||||
Current set 0: 40012a - - -
|
||||
L1 HIT
|
||||
Count_Block Update
|
||||
Changed set 0: 40012a - - -
|
||||
# 48 : Read 4001299c
|
||||
L1 Read: 4001299c(tag 400129, index 4)
|
||||
Current set 4: 400129 4008b3 - -
|
||||
L1 HIT
|
||||
Count_Block Update
|
||||
Changed set 4: 400129 4008b3 - -
|
||||
# 49 : Read 4008b390
|
||||
L1 Read: 4008b390(tag 4008b3, index 4)
|
||||
Current set 4: 400129 4008b3 - -
|
||||
L1 HIT
|
||||
Count_Block Update
|
||||
Changed set 4: 400129 4008b3 - -
|
||||
# 50 : Write 4002e84c
|
||||
L1 Write: 4002e84c(tag 4002e8, index 2)
|
||||
Current set 2: - - - -
|
||||
L1 MISS, WRITE THROUGH
|
||||
Changed set 2: - - - -
|
||||
# 51 : Write 4002e850
|
||||
L1 Write: 4002e850(tag 4002e8, index 2)
|
||||
Current set 2: - - - -
|
||||
L1 MISS, WRITE THROUGH
|
||||
Changed set 2: - - - -
|
||||
# 52 : Read 4001299c
|
||||
L1 Read: 4001299c(tag 400129, index 4)
|
||||
Current set 4: 400129 4008b3 - -
|
||||
L1 HIT
|
||||
Count_Block Update
|
||||
Changed set 4: 400129 4008b3 - -
|
||||
# 53 : Write 4003c214
|
||||
L1 Write: 4003c214(tag 4003c2, index 0)
|
||||
Current set 0: 40012a - - -
|
||||
L1 MISS, WRITE THROUGH
|
||||
Changed set 0: 40012a - - -
|
||||
# 54 : Read 4001299c
|
||||
L1 Read: 4001299c(tag 400129, index 4)
|
||||
Current set 4: 400129 4008b3 - -
|
||||
L1 HIT
|
||||
Count_Block Update
|
||||
Changed set 4: 400129 4008b3 - -
|
||||
# 55 : Write 40049614
|
||||
L1 Write: 40049614(tag 400496, index 0)
|
||||
Current set 0: 40012a - - -
|
||||
L1 MISS, WRITE THROUGH
|
||||
Changed set 0: 40012a - - -
|
||||
# 56 : Read 40012a14
|
||||
L1 Read: 40012a14(tag 40012a, index 0)
|
||||
Current set 0: 40012a - - -
|
||||
L1 HIT
|
||||
Count_Block Update
|
||||
Changed set 0: 40012a - - -
|
||||
# 57 : Write 4002e868
|
||||
L1 Write: 4002e868(tag 4002e8, index 3)
|
||||
Current set 3: - - - -
|
||||
L1 MISS, WRITE THROUGH
|
||||
Changed set 3: - - - -
|
||||
# 58 : Read 400129a0
|
||||
L1 Read: 400129a0(tag 400129, index 5)
|
||||
Current set 5: - - - -
|
||||
L1 MISS
|
||||
Count_Block Update
|
||||
Changed set 5: 400129 - - -
|
||||
# 59 : Read 4008b390
|
||||
L1 Read: 4008b390(tag 4008b3, index 4)
|
||||
Current set 4: 400129 4008b3 - -
|
||||
L1 HIT
|
||||
Count_Block Update
|
||||
Changed set 4: 400129 4008b3 - -
|
||||
# 60 : Write 4002e84c
|
||||
L1 Write: 4002e84c(tag 4002e8, index 2)
|
||||
Current set 2: - - - -
|
||||
L1 MISS, WRITE THROUGH
|
||||
Changed set 2: - - - -
|
||||
# 61 : Write 4002e850
|
||||
L1 Write: 4002e850(tag 4002e8, index 2)
|
||||
Current set 2: - - - -
|
||||
L1 MISS, WRITE THROUGH
|
||||
Changed set 2: - - - -
|
||||
# 62 : Read 400129a0
|
||||
L1 Read: 400129a0(tag 400129, index 5)
|
||||
Current set 5: 400129 - - -
|
||||
L1 HIT
|
||||
Count_Block Update
|
||||
Changed set 5: 400129 - - -
|
||||
# 63 : Write 4003c218
|
||||
L1 Write: 4003c218(tag 4003c2, index 0)
|
||||
Current set 0: 40012a - - -
|
||||
L1 MISS, WRITE THROUGH
|
||||
Changed set 0: 40012a - - -
|
||||
# 64 : Read 400129a0
|
||||
L1 Read: 400129a0(tag 400129, index 5)
|
||||
Current set 5: 400129 - - -
|
||||
L1 HIT
|
||||
Count_Block Update
|
||||
Changed set 5: 400129 - - -
|
||||
# 65 : Write 40049618
|
||||
L1 Write: 40049618(tag 400496, index 0)
|
||||
Current set 0: 40012a - - -
|
||||
L1 MISS, WRITE THROUGH
|
||||
Changed set 0: 40012a - - -
|
||||
# 66 : Read 40012a18
|
||||
L1 Read: 40012a18(tag 40012a, index 0)
|
||||
Current set 0: 40012a - - -
|
||||
L1 HIT
|
||||
Count_Block Update
|
||||
Changed set 0: 40012a - - -
|
||||
# 67 : Read 400129a4
|
||||
L1 Read: 400129a4(tag 400129, index 5)
|
||||
Current set 5: 400129 - - -
|
||||
L1 HIT
|
||||
Count_Block Update
|
||||
Changed set 5: 400129 - - -
|
||||
# 68 : Read 4008b390
|
||||
L1 Read: 4008b390(tag 4008b3, index 4)
|
||||
Current set 4: 400129 4008b3 - -
|
||||
L1 HIT
|
||||
Count_Block Update
|
||||
Changed set 4: 400129 4008b3 - -
|
||||
# 69 : Write 4002e84c
|
||||
L1 Write: 4002e84c(tag 4002e8, index 2)
|
||||
Current set 2: - - - -
|
||||
L1 MISS, WRITE THROUGH
|
||||
Changed set 2: - - - -
|
||||
# 70 : Write 4002e850
|
||||
L1 Write: 4002e850(tag 4002e8, index 2)
|
||||
Current set 2: - - - -
|
||||
L1 MISS, WRITE THROUGH
|
||||
Changed set 2: - - - -
|
||||
# 71 : Read 400129a4
|
||||
L1 Read: 400129a4(tag 400129, index 5)
|
||||
Current set 5: 400129 - - -
|
||||
L1 HIT
|
||||
Count_Block Update
|
||||
Changed set 5: 400129 - - -
|
||||
# 72 : Write 4003c21c
|
||||
L1 Write: 4003c21c(tag 4003c2, index 0)
|
||||
Current set 0: 40012a - - -
|
||||
L1 MISS, WRITE THROUGH
|
||||
Changed set 0: 40012a - - -
|
||||
# 73 : Read 400129a4
|
||||
L1 Read: 400129a4(tag 400129, index 5)
|
||||
Current set 5: 400129 - - -
|
||||
L1 HIT
|
||||
Count_Block Update
|
||||
Changed set 5: 400129 - - -
|
||||
# 74 : Write 4004961c
|
||||
L1 Write: 4004961c(tag 400496, index 0)
|
||||
Current set 0: 40012a - - -
|
||||
L1 MISS, WRITE THROUGH
|
||||
Changed set 0: 40012a - - -
|
||||
# 75 : Read 40012a1c
|
||||
L1 Read: 40012a1c(tag 40012a, index 0)
|
||||
Current set 0: 40012a - - -
|
||||
L1 HIT
|
||||
Count_Block Update
|
||||
Changed set 0: 40012a - - -
|
||||
# 76 : Read 400129a8
|
||||
L1 Read: 400129a8(tag 400129, index 5)
|
||||
Current set 5: 400129 - - -
|
||||
L1 HIT
|
||||
Count_Block Update
|
||||
Changed set 5: 400129 - - -
|
||||
# 77 : Read 4008b390
|
||||
L1 Read: 4008b390(tag 4008b3, index 4)
|
||||
Current set 4: 400129 4008b3 - -
|
||||
L1 HIT
|
||||
Count_Block Update
|
||||
Changed set 4: 400129 4008b3 - -
|
||||
# 78 : Write 4002e84c
|
||||
L1 Write: 4002e84c(tag 4002e8, index 2)
|
||||
Current set 2: - - - -
|
||||
L1 MISS, WRITE THROUGH
|
||||
Changed set 2: - - - -
|
||||
# 79 : Write 4002e850
|
||||
L1 Write: 4002e850(tag 4002e8, index 2)
|
||||
Current set 2: - - - -
|
||||
L1 MISS, WRITE THROUGH
|
||||
Changed set 2: - - - -
|
||||
# 80 : Read 400129a8
|
||||
L1 Read: 400129a8(tag 400129, index 5)
|
||||
Current set 5: 400129 - - -
|
||||
L1 HIT
|
||||
Count_Block Update
|
||||
Changed set 5: 400129 - - -
|
||||
# 81 : Write 4003c220
|
||||
L1 Write: 4003c220(tag 4003c2, index 1)
|
||||
Current set 1: - - - -
|
||||
L1 MISS, WRITE THROUGH
|
||||
Changed set 1: - - - -
|
||||
# 82 : Read 400129a8
|
||||
L1 Read: 400129a8(tag 400129, index 5)
|
||||
Current set 5: 400129 - - -
|
||||
L1 HIT
|
||||
Count_Block Update
|
||||
Changed set 5: 400129 - - -
|
||||
# 83 : Write 40049620
|
||||
L1 Write: 40049620(tag 400496, index 1)
|
||||
Current set 1: - - - -
|
||||
L1 MISS, WRITE THROUGH
|
||||
Changed set 1: - - - -
|
||||
# 84 : Read 40012a20
|
||||
L1 Read: 40012a20(tag 40012a, index 1)
|
||||
Current set 1: - - - -
|
||||
L1 MISS
|
||||
Count_Block Update
|
||||
Changed set 1: 40012a - - -
|
||||
# 85 : Read 400129ac
|
||||
L1 Read: 400129ac(tag 400129, index 5)
|
||||
Current set 5: 400129 - - -
|
||||
L1 HIT
|
||||
Count_Block Update
|
||||
Changed set 5: 400129 - - -
|
||||
# 86 : Read 4008b390
|
||||
L1 Read: 4008b390(tag 4008b3, index 4)
|
||||
Current set 4: 400129 4008b3 - -
|
||||
L1 HIT
|
||||
Count_Block Update
|
||||
Changed set 4: 400129 4008b3 - -
|
||||
# 87 : Write 4002e84c
|
||||
L1 Write: 4002e84c(tag 4002e8, index 2)
|
||||
Current set 2: - - - -
|
||||
L1 MISS, WRITE THROUGH
|
||||
Changed set 2: - - - -
|
||||
# 88 : Write 4002e850
|
||||
L1 Write: 4002e850(tag 4002e8, index 2)
|
||||
Current set 2: - - - -
|
||||
L1 MISS, WRITE THROUGH
|
||||
Changed set 2: - - - -
|
||||
# 89 : Read 400129ac
|
||||
L1 Read: 400129ac(tag 400129, index 5)
|
||||
Current set 5: 400129 - - -
|
||||
L1 HIT
|
||||
Count_Block Update
|
||||
Changed set 5: 400129 - - -
|
||||
# 90 : Write 4003c224
|
||||
L1 Write: 4003c224(tag 4003c2, index 1)
|
||||
Current set 1: 40012a - - -
|
||||
L1 MISS, WRITE THROUGH
|
||||
Changed set 1: 40012a - - -
|
||||
# 91 : Read 400129ac
|
||||
L1 Read: 400129ac(tag 400129, index 5)
|
||||
Current set 5: 400129 - - -
|
||||
L1 HIT
|
||||
Count_Block Update
|
||||
Changed set 5: 400129 - - -
|
||||
# 92 : Write 40049624
|
||||
L1 Write: 40049624(tag 400496, index 1)
|
||||
Current set 1: 40012a - - -
|
||||
L1 MISS, WRITE THROUGH
|
||||
Changed set 1: 40012a - - -
|
||||
# 93 : Read 40012a24
|
||||
L1 Read: 40012a24(tag 40012a, index 1)
|
||||
Current set 1: 40012a - - -
|
||||
L1 HIT
|
||||
Count_Block Update
|
||||
Changed set 1: 40012a - - -
|
||||
# 94 : Read 400129b0
|
||||
L1 Read: 400129b0(tag 400129, index 5)
|
||||
Current set 5: 400129 - - -
|
||||
L1 HIT
|
||||
Count_Block Update
|
||||
Changed set 5: 400129 - - -
|
||||
# 95 : Read 4008b390
|
||||
L1 Read: 4008b390(tag 4008b3, index 4)
|
||||
Current set 4: 400129 4008b3 - -
|
||||
L1 HIT
|
||||
Count_Block Update
|
||||
Changed set 4: 400129 4008b3 - -
|
||||
# 96 : Write 4002e84c
|
||||
L1 Write: 4002e84c(tag 4002e8, index 2)
|
||||
Current set 2: - - - -
|
||||
L1 MISS, WRITE THROUGH
|
||||
Changed set 2: - - - -
|
||||
# 97 : Write 4002e850
|
||||
L1 Write: 4002e850(tag 4002e8, index 2)
|
||||
Current set 2: - - - -
|
||||
L1 MISS, WRITE THROUGH
|
||||
Changed set 2: - - - -
|
||||
# 98 : Read 400129b0
|
||||
L1 Read: 400129b0(tag 400129, index 5)
|
||||
Current set 5: 400129 - - -
|
||||
L1 HIT
|
||||
Count_Block Update
|
||||
Changed set 5: 400129 - - -
|
||||
# 99 : Write 4003c228
|
||||
L1 Write: 4003c228(tag 4003c2, index 1)
|
||||
Current set 1: 40012a - - -
|
||||
L1 MISS, WRITE THROUGH
|
||||
Changed set 1: 40012a - - -
|
||||
# 100 : Read 400129b0
|
||||
L1 Read: 400129b0(tag 400129, index 5)
|
||||
Current set 5: 400129 - - -
|
||||
L1 HIT
|
||||
Count_Block Update
|
||||
Changed set 5: 400129 - - -
|
||||
|
|
@ -0,0 +1,12 @@
|
|||
1. These are the debug runs, which provide a step-by-step execution of the trace through the simulator. The debug runs are not run for the entire trace, but only the first few addresses (about 1000). This should be enough to expose logical flaws during debugging.
|
||||
|
||||
2. The following commands are to be used:
|
||||
./sim_cache 16 16384 1 0 0 gcc_trace.txt > DebugRun1.txt
|
||||
|
||||
./sim_cache 128 2048 8 0 1 go_trace.txt > DebugRun2.txt
|
||||
|
||||
./sim_cache 32 4096 4 0 1 perl_trace.txt > DebugRun3.txt
|
||||
|
||||
./sim_cache 64 8192 2 1 0 gcc_trace.txt > DebugRun4.txt
|
||||
|
||||
./sim_cache 32 1024 4 1 1 go_trace.txt > DebugRun5.txt
|
||||
Binary file not shown.
|
After Width: | Height: | Size: 114 KiB |
|
|
@ -0,0 +1,48 @@
|
|||
CC = g++
|
||||
OPT = -O3 -m32
|
||||
#OPT = -g -m32
|
||||
WARN = -Wall
|
||||
CFLAGS = $(OPT) $(WARN) $(INC) $(LIB)
|
||||
|
||||
# List all your .cc files here (source files, excluding header files)
|
||||
SIM_SRC = main.cc world.cc
|
||||
|
||||
# List corresponding compiled object files here (.o files)
|
||||
SIM_OBJ = main.o cache.o para.o
|
||||
|
||||
TEST_OBJ = test.o para.o
|
||||
|
||||
#################################
|
||||
|
||||
# default rule
|
||||
|
||||
all: sim_cache
|
||||
@echo "my work is done here..."
|
||||
|
||||
|
||||
# rule for making sim_cache
|
||||
|
||||
sim_cache: $(SIM_OBJ)
|
||||
$(CC) -o sim_cache $(CFLAGS) $(SIM_OBJ) -lm
|
||||
@echo "-----------DONE WITH SIM_CACHE-----------"
|
||||
|
||||
|
||||
# generic rule for converting any .cc file to any .o file
|
||||
.cc.o:
|
||||
$(CC) $(CFLAGS) -c $*.cc
|
||||
|
||||
# type "make clean" to remove all .o files plus the sim_cache binary
|
||||
clean:
|
||||
rm -f *.o sim_cache test
|
||||
rm -f *.txt *.diff
|
||||
|
||||
|
||||
# type "make clobber" to remove all .o files (leaves sim_cache binary)
|
||||
|
||||
clobber:
|
||||
rm -f *.o
|
||||
|
||||
test: $(TEST_OBJ)
|
||||
$(CC) -o test $(CFLAGS) $(TEST_OBJ) -lm
|
||||
@echo "-----------Start Testing Functions-----------"
|
||||
./test 32 8192 4 0 1 ../Readme.txt
|
||||
|
|
@ -0,0 +1,108 @@
|
|||
#include "cache.h"
|
||||
#include "para.h"
|
||||
#include <algorithm>
|
||||
#include <cstdint>
|
||||
#include <exception>
|
||||
#include <fstream>
|
||||
#include <iostream>
|
||||
using namespace std;
|
||||
Cache::Cache(int argc, char *argv[]){
|
||||
p.Extract(argc, argv);
|
||||
st.SetCP(&p);
|
||||
c.resize(p.GetMaxIndex());
|
||||
for (auto &b : c) b.bs.resize(p.GetAs());
|
||||
}
|
||||
|
||||
void Cache::Read(uint32_t rawAddr){
|
||||
return Visit(rawAddr, false);
|
||||
}
|
||||
|
||||
void Cache::Write(uint32_t rawAddr){
|
||||
return Visit(rawAddr, true);
|
||||
}
|
||||
|
||||
void Cache::Visit(uint32_t rawAddr, bool isWrite){
|
||||
|
||||
isWrite ? st.Write() : st.Read();
|
||||
|
||||
auto addr = p.AddrParser(rawAddr);
|
||||
auto s = &c[addr.index];
|
||||
auto tag = addr.tag;
|
||||
|
||||
auto hit = find_if(
|
||||
s->bs.begin(),
|
||||
s->bs.end(),
|
||||
[tag](const Block& b) {
|
||||
return b.v && b.tag == tag;
|
||||
}
|
||||
);
|
||||
|
||||
if (hit != s->bs.end()){
|
||||
// Cache Hit!
|
||||
hit->cb ++;
|
||||
hit->lu = lru ++;
|
||||
if (isWrite && p.WritePolicy() == CacheParam::WBWA) {
|
||||
hit->d = true;
|
||||
}
|
||||
return;
|
||||
}
|
||||
|
||||
isWrite ? st.WriteMiss() : st.ReadMiss();
|
||||
|
||||
if (isWrite && p.WritePolicy() == CacheParam::WTNA)
|
||||
return;
|
||||
|
||||
auto toReplace = find_if(
|
||||
s->bs.begin(),
|
||||
s->bs.end(),
|
||||
[](const Block& b){
|
||||
return !b.v;
|
||||
}
|
||||
);
|
||||
|
||||
if (toReplace == s->bs.end()){
|
||||
// Replace
|
||||
toReplace = min_element(
|
||||
s->bs.begin(),
|
||||
s->bs.end(),
|
||||
p.ReplicementPolicy() == CacheParam::LRU
|
||||
?
|
||||
[](const Block &a, const Block &b){ return a.lu < b.lu; }
|
||||
:
|
||||
[](const Block&a, const Block&b){ return a.cb < b.cb; }
|
||||
);
|
||||
}
|
||||
|
||||
if (toReplace->d) {
|
||||
// Write to the L2 or Disk
|
||||
st.WriteBack();
|
||||
}
|
||||
|
||||
s->cs = toReplace->cb;
|
||||
|
||||
*toReplace = {addr.tag, s->cs + 1, lru ++, isWrite, true};
|
||||
|
||||
// TODO: L2 Cache
|
||||
|
||||
// if (isWrite){
|
||||
// if (p.WritePolicy() == CacheParam::WBWA) {
|
||||
// // Write through
|
||||
// st.WriteBack();
|
||||
// }
|
||||
// } else {
|
||||
// // Bring from Disk or L2
|
||||
// }
|
||||
|
||||
}
|
||||
|
||||
void Cache::Run(){
|
||||
ifstream trace("../traces/" + p.TraceFile());
|
||||
string line;
|
||||
char op;
|
||||
unsigned addr;
|
||||
while(getline(trace, line) && (istringstream(line) >> op >> hex >> addr)) {
|
||||
Visit(addr, op == 'w');
|
||||
}
|
||||
trace.close();
|
||||
}
|
||||
|
||||
|
|
@ -0,0 +1,69 @@
|
|||
#ifndef __CACHE_H__
|
||||
#define __CACHE_H__
|
||||
#include "para.h"
|
||||
#include "statistic.h"
|
||||
#include <bitset>
|
||||
#include <cstdint>
|
||||
#include <exception>
|
||||
#include <iomanip>
|
||||
#include <ostream>
|
||||
#include <vector>
|
||||
|
||||
class Cache {
|
||||
private:
|
||||
CacheParam p;
|
||||
Statistic st;
|
||||
uint32_t lru = 0; // LRU Global Counter
|
||||
struct Block{
|
||||
uint32_t tag = 0; // tag
|
||||
uint32_t cb = 0; // count block
|
||||
uint32_t lu = 0; // Last Used
|
||||
bool d = false; // dirty
|
||||
bool v = false; // valid
|
||||
bool operator<(const Block &t) {return cb < t.cb;}
|
||||
friend ostream& operator<<(ostream& os, Block&b) {
|
||||
os << "{tag:" << b.tag << ", Count-Block:" << b.cb << ", Last-Used:" << b.lu << ", Dirty:" << b.d << ", Valid:" << b.v << "}";
|
||||
return os;
|
||||
}
|
||||
|
||||
};
|
||||
|
||||
struct Set {
|
||||
uint32_t cs = 0; // count set
|
||||
vector<Block> bs; // Blocks
|
||||
};
|
||||
|
||||
vector<Set> c; // cache
|
||||
|
||||
Cache * L2;
|
||||
|
||||
public:
|
||||
Cache(){}
|
||||
Cache(int argc, char *argv[]);
|
||||
|
||||
void Write(uint32_t addr);
|
||||
void Read(uint32_t addr);
|
||||
|
||||
void Visit(uint32_t addr, bool isWrite);
|
||||
|
||||
friend ostream& operator<<(ostream& os, Cache& c){
|
||||
|
||||
os << c.p;
|
||||
|
||||
os << "===== L1 contents =====" << endl;
|
||||
for (uint32_t i=0;i!=c.c.size();i++){
|
||||
os << "set" << setw(4) << i << ":";
|
||||
for(auto &b:c.c[i].bs)
|
||||
os << hex << setw(8) << b.tag << ' ' << ((c.p.WritePolicy() == CacheParam::WBWA && b.d) ? 'D' : ' ');
|
||||
os << endl << dec;
|
||||
}
|
||||
|
||||
os << c.st;
|
||||
return os;
|
||||
}
|
||||
|
||||
void Run();
|
||||
|
||||
};
|
||||
|
||||
#endif // !__CACHE_H__
|
||||
|
|
@ -0,0 +1,9 @@
|
|||
#include "cache.h"
|
||||
#include <iostream>
|
||||
using namespace std;
|
||||
|
||||
int main(int argc, char *argv[]) {
|
||||
auto c = Cache(argc, argv);
|
||||
c.Run();
|
||||
cout << c ;
|
||||
}
|
||||
|
|
@ -0,0 +1,61 @@
|
|||
#include <cstdlib>
|
||||
#include <sstream>
|
||||
#include <stdexcept>
|
||||
#include <stdlib.h>
|
||||
#include <stdio.h>
|
||||
#include <sys/stat.h>
|
||||
|
||||
#include "para.h"
|
||||
|
||||
int CacheParam::Extract(int argc, char* argv[]){
|
||||
std::stringstream strh;
|
||||
strh << "Usage: " << argv[0] << " <L1_BLOCKSIZE> <L1_SIZE> <L1_ASSOC> <L1_REPLACEMENT_POLICY> <L1_WRITE_POLICY> <TRACE_FILE>\n\t<L1_REPLACEMENT_POLICY>: 0 for LRU, 1 for LFU\n\t<L1_WRITE_POLICY>: 0 for WBWA, 1 for WTNA" << endl;
|
||||
|
||||
std::stringstream stre;
|
||||
if(argc != 7) {
|
||||
stre << "Error! Must have all 6 Arguments!";
|
||||
throw Exception(stre.str(), strh.str());
|
||||
}
|
||||
|
||||
bs = atoi(argv[1]);
|
||||
if ((bs < 0) || !(bs ^ (bs-1))) {
|
||||
stre << "Block Size: '" << bs << "' INVALID! Must be (2^x) && > 0";
|
||||
throw Exception(stre.str(), strh.str());
|
||||
}
|
||||
|
||||
s = atoi(argv[2]);
|
||||
if (s < 0) {
|
||||
stre << "Cache Size: '"<< s << "' INVALID! Must be > 0";
|
||||
throw Exception(stre.str(), strh.str());
|
||||
}
|
||||
|
||||
as = atoi(argv[3]);
|
||||
if (as < 1) {
|
||||
stre << "Cache Association: '" << as << "' INVALID! Must be >= 1";
|
||||
throw Exception(stre.str(), strh.str());
|
||||
}
|
||||
|
||||
rp = atoi(argv[4]);
|
||||
if (rp!=LRU && rp!=LFU){
|
||||
stre << "Replacement Policy: '" << rp << "' INVALID! Must be 0 (LRU) or 1 (LFU)";
|
||||
throw Exception(stre.str(), strh.str());
|
||||
}
|
||||
|
||||
wp = atoi(argv[5]);
|
||||
if (wp!=WBWA && wp!=WTNA){
|
||||
stre << "Write Policy: '" << wp << "' INVALID! Must be 0 (WBWA) or 1 (WTNA)";
|
||||
throw Exception(stre.str(), strh.str());
|
||||
}
|
||||
|
||||
tf = std::string(argv[6]);
|
||||
struct stat buffer;
|
||||
if (stat(("../traces/"+tf).c_str(), &buffer)) {
|
||||
stre << "Trace File: '" << tf << "' INVALID! Cannot Open it";
|
||||
throw Exception(stre.str(), strh.str());
|
||||
}
|
||||
|
||||
setupTIO();
|
||||
|
||||
return 0;
|
||||
}
|
||||
|
||||
|
|
@ -0,0 +1,155 @@
|
|||
#ifndef __PARA_H__
|
||||
#define __PARA_H__
|
||||
#include <cstdint>
|
||||
#include <bitset>
|
||||
#include <optional>
|
||||
#include <ostream>
|
||||
#include <sstream>
|
||||
#include <string>
|
||||
#include <iomanip>
|
||||
using namespace std;
|
||||
|
||||
class Exception: public exception{
|
||||
private:
|
||||
string message;
|
||||
public:
|
||||
Exception(string msg, string help): message("\033[31m" + msg + "\n" + help + "\033[0m") {};
|
||||
const char * what() const throw() {
|
||||
return message.c_str();
|
||||
}
|
||||
};
|
||||
|
||||
struct TIO {
|
||||
uint32_t tag, index, offset;
|
||||
};
|
||||
|
||||
|
||||
/**
|
||||
* @class CacheParam
|
||||
* @brief
|
||||
*
|
||||
*/
|
||||
class CacheParam {
|
||||
public:
|
||||
enum {
|
||||
LRU = 0,
|
||||
LFU
|
||||
};
|
||||
|
||||
enum {
|
||||
WBWA = 0,
|
||||
WTNA
|
||||
};
|
||||
|
||||
private:
|
||||
int bs; // Block Size
|
||||
int s; // Size
|
||||
int as; // Assoc
|
||||
int rp; // Replicement Policy
|
||||
int wp; // Write Policy: 1 -> WTNA, 0 ->
|
||||
string tf; // Trace File Name
|
||||
string help; // help
|
||||
|
||||
// +-------------+------+---+
|
||||
// | t | i | o |
|
||||
// +-------------+------+---+
|
||||
|
||||
public:
|
||||
int t; // tag bit
|
||||
int i; // index
|
||||
int o; // offset
|
||||
|
||||
uint32_t om; // offset mask
|
||||
uint32_t im; // index mask
|
||||
|
||||
public:
|
||||
|
||||
int BlockSize() {return bs;}
|
||||
int Size() {return s;}
|
||||
int Assoc() {return as;}
|
||||
int ReplicementPolicy() {return rp;}
|
||||
int WritePolicy() {return wp;}
|
||||
string TraceFile() {return tf;}
|
||||
|
||||
/**
|
||||
* @brief Extract Cache Parameter p
|
||||
*
|
||||
* @param argc
|
||||
* @param argv
|
||||
* @return
|
||||
* 1: Error (throw)
|
||||
* 0: Success
|
||||
*/
|
||||
int Extract(int argc, char* argv[]);
|
||||
|
||||
// ===== Simulator configuration =====
|
||||
// L1_BLOCKSIZE: 16
|
||||
// L1_SIZE: 16384
|
||||
// L1_ASSOC: 1
|
||||
// L1_REPLACEMENT_POLICY: 0
|
||||
// L1_WRITE_POLICY: 0
|
||||
// trace_file: gcc_trace.txt
|
||||
// ===================================
|
||||
friend ostream& operator<<(ostream &os, const CacheParam& cp){
|
||||
os << " ===== Simulator configuration =====\n";
|
||||
os << " L1_BLOCKSIZE:" << setw(22) << cp.bs << endl;
|
||||
os << " L1_SIZE:" << setw(27) << cp.s << endl;
|
||||
os << " L1_ASSOC:" << setw(26) << cp.as << endl;
|
||||
os << " L1_REPLACEMENT_POLICY:" << setw(13) << cp.rp << endl;
|
||||
os << " L1_WRITE_POLICY:" << setw(19) << cp.wp << endl;
|
||||
os << " trace_file:" << setw(24) << cp.tf << endl;
|
||||
os << " ===================================\n\n";
|
||||
return os;
|
||||
}
|
||||
|
||||
/**
|
||||
* @brief Get HT
|
||||
* @return 0.25 + 2.5 * (s/ (512.0 * 1024)) + 0.025 * (bs/ 16.0) + 0.025 * as;
|
||||
*/
|
||||
double GetHT() {
|
||||
return 0.25 + 2.5 * (s/ (512.0 * 1024)) + 0.025 * (bs/ 16.0) + 0.025 * as;
|
||||
}
|
||||
|
||||
/**
|
||||
* @brief Get Miss Penalty
|
||||
* @return 20 + 0.5 * (bs / 16.0);
|
||||
*/
|
||||
double GetMP() {
|
||||
return 20 + 0.5 * (bs / 16.0);
|
||||
}
|
||||
|
||||
int log2_floor(uint32_t x) {
|
||||
return x == 0 ? -1 : 31 - __builtin_clz(x);
|
||||
}
|
||||
|
||||
uint32_t GetMaxIndex() {
|
||||
return (1<<i);
|
||||
}
|
||||
|
||||
uint32_t GetAs() {
|
||||
return as;
|
||||
}
|
||||
|
||||
void setupTIO(){
|
||||
// setup t, i, b
|
||||
o = log2_floor(bs);
|
||||
i = log2_floor(s/(bs*as));
|
||||
t = 32 - o - i;
|
||||
|
||||
om = (1<<o) - 1;
|
||||
im = ((1<<i)-1) << o;
|
||||
}
|
||||
|
||||
TIO AddrParser(uint32_t addr){
|
||||
uint32_t offset = addr & om;
|
||||
uint32_t index = (addr & im) >> o;
|
||||
uint32_t tag = addr >> (o+i);
|
||||
return {tag, index, offset};
|
||||
}
|
||||
|
||||
string GetHelp(){return help;}
|
||||
|
||||
};
|
||||
|
||||
|
||||
#endif // !__PARA_H__
|
||||
|
|
@ -0,0 +1,60 @@
|
|||
#ifndef __STATUS_H__
|
||||
#define __STATUS_H__
|
||||
#include "para.h"
|
||||
#include <ostream>
|
||||
class Statistic{
|
||||
private:
|
||||
int r = 0; // Read Count
|
||||
int rm = 0; // Read Miss
|
||||
int w = 0; // Write Count
|
||||
int wm = 0; // Write Miss
|
||||
int wb = 0; // Write Back
|
||||
|
||||
CacheParam *p;
|
||||
|
||||
|
||||
public:
|
||||
void SetCP(CacheParam *cp) { p = cp; }
|
||||
|
||||
void Read() { r++; }
|
||||
void ReadMiss() { rm++; }
|
||||
void Write() { w++; }
|
||||
void WriteMiss() { wm++; }
|
||||
void WriteBack() { wb++; }
|
||||
int GetCommunication() { return rm+wm+wb; }
|
||||
|
||||
double GetMR() {
|
||||
return (rm + wm) / (double)(r+w);
|
||||
}
|
||||
|
||||
/**
|
||||
* @brief Get Average Access Time
|
||||
* @return
|
||||
*/
|
||||
double GetAAT() {
|
||||
double HT = p->GetHT();
|
||||
double MP = p->GetMP();
|
||||
double MR = GetMR();
|
||||
return HT + (MP*MR);
|
||||
}
|
||||
|
||||
friend ostream& operator<<(ostream &os, const Statistic& st){
|
||||
|
||||
os << "\n ====== Simulation results (raw) ======\n";
|
||||
os << " a. number of L1 reads:" << setw(16) << st.r << endl;
|
||||
os << " b. number of L1 read misses:" << setw(10) << st.rm << endl;
|
||||
os << " c. number of L1 writes:" << setw(15) << st.w << endl;
|
||||
os << " d. number of L1 write misses:" << setw(9) << st.wm << endl;
|
||||
double mr = (st.rm + st.wm) / (double)(st.r + st.w);
|
||||
os << " e. L1 miss rate:" << setw(22) << fixed << setprecision(4) << mr << endl;
|
||||
os << " f. number of writebacks from L1:" << setw(6) << st.wb << endl;
|
||||
os << " g. total memory traffic:" << setw(14) << ((st.p->WritePolicy()) ? (st.rm + st.w) : (st.rm + st.wm + st.wb));
|
||||
os << "\n\n ==== Simulation results (performance) ====\n";
|
||||
double ht = st.p->GetHT();
|
||||
double mp = st.p->GetMP();
|
||||
os << " 1. average access time:" << setw(15) << ht + mr * mp << " ns";
|
||||
return os;
|
||||
}
|
||||
|
||||
};
|
||||
#endif // !__STATUS_H__
|
||||
|
|
@ -0,0 +1,17 @@
|
|||
#include "para.h"
|
||||
#include <exception>
|
||||
#include <iostream>
|
||||
using namespace std;
|
||||
int main(int argc, char *argv[]) {
|
||||
///////////////////////////// Test Extraction
|
||||
CacheParam p;
|
||||
try {
|
||||
p.Extract(argc, argv);
|
||||
}
|
||||
catch (const exception &e) {
|
||||
cout << e.what() << endl;
|
||||
cout << p.GetHelp() << endl;
|
||||
return 1;
|
||||
}
|
||||
cout << p << endl;
|
||||
}
|
||||
|
|
@ -0,0 +1,12 @@
|
|||
#include <stdio.h>
|
||||
|
||||
void hello_world(int argc, char *argv[]) {
|
||||
printf("\n\nHello World!\n\n");
|
||||
|
||||
for (unsigned int i = 0; i < (unsigned int)argc; i++)
|
||||
printf("argument #%d = %s\n", i, argv[i]);
|
||||
|
||||
printf("\n\n");
|
||||
|
||||
}
|
||||
|
||||
|
|
@ -0,0 +1 @@
|
|||
void hello_world(int argc, char *argv[]);
|
||||
100000
cache/TJU-2023-Computer-Organization/Proj1-1/Proj1-1/traces/gcc_trace.txt
vendored
Normal file
100000
cache/TJU-2023-Computer-Organization/Proj1-1/Proj1-1/traces/gcc_trace.txt
vendored
Normal file
File diff suppressed because it is too large
Load Diff
100000
cache/TJU-2023-Computer-Organization/Proj1-1/Proj1-1/traces/go_trace.txt
vendored
Normal file
100000
cache/TJU-2023-Computer-Organization/Proj1-1/Proj1-1/traces/go_trace.txt
vendored
Normal file
File diff suppressed because it is too large
Load Diff
100000
cache/TJU-2023-Computer-Organization/Proj1-1/Proj1-1/traces/perl_trace.txt
vendored
Normal file
100000
cache/TJU-2023-Computer-Organization/Proj1-1/Proj1-1/traces/perl_trace.txt
vendored
Normal file
File diff suppressed because it is too large
Load Diff
1046
cache/TJU-2023-Computer-Organization/Proj1-1/Proj1-1/validation/ValidationRun1.txt
vendored
Normal file
1046
cache/TJU-2023-Computer-Organization/Proj1-1/Proj1-1/validation/ValidationRun1.txt
vendored
Normal file
File diff suppressed because it is too large
Load Diff
24
cache/TJU-2023-Computer-Organization/Proj1-1/Proj1-1/validation/ValidationRun2.txt
vendored
Normal file
24
cache/TJU-2023-Computer-Organization/Proj1-1/Proj1-1/validation/ValidationRun2.txt
vendored
Normal file
|
|
@ -0,0 +1,24 @@
|
|||
===== Simulator configuration =====
|
||||
L1_BLOCKSIZE: 128
|
||||
L1_SIZE: 2048
|
||||
L1_ASSOC: 8
|
||||
L1_REPLACEMENT_POLICY: 0
|
||||
L1_WRITE_POLICY: 1
|
||||
trace_file: go_trace.txt
|
||||
===================================
|
||||
|
||||
===== L1 contents =====
|
||||
set 0: 4004e0 400321 40031f 40040c 400320 40040b 4004e1 40040d
|
||||
set 1: 40040c 4004e1 4008b3 400652 400320 40031f 40040d 4004e0
|
||||
|
||||
====== Simulation results (raw) ======
|
||||
a. number of L1 reads: 60613
|
||||
b. number of L1 read misses: 984
|
||||
c. number of L1 writes: 39387
|
||||
d. number of L1 write misses: 26075
|
||||
e. L1 miss rate: 0.2706
|
||||
f. number of writebacks from L1: 0
|
||||
g. total memory traffic: 40371
|
||||
|
||||
==== Simulation results (performance) ====
|
||||
1. average access time: 7.1539 ns
|
||||
54
cache/TJU-2023-Computer-Organization/Proj1-1/Proj1-1/validation/ValidationRun3.txt
vendored
Normal file
54
cache/TJU-2023-Computer-Organization/Proj1-1/Proj1-1/validation/ValidationRun3.txt
vendored
Normal file
|
|
@ -0,0 +1,54 @@
|
|||
===== Simulator configuration =====
|
||||
L1_BLOCKSIZE: 32
|
||||
L1_SIZE: 4096
|
||||
L1_ASSOC: 4
|
||||
L1_REPLACEMENT_POLICY: 0
|
||||
L1_WRITE_POLICY: 1
|
||||
trace_file: perl_trace.txt
|
||||
===================================
|
||||
|
||||
===== L1 contents =====
|
||||
set 0: 10007a 10006d 10007b 100075
|
||||
set 1: 1000b4 10007b 100073 100035
|
||||
set 2: 100035 10007b 1000b3 1000b4
|
||||
set 3: 1000b0 1000a1 100035 10007b
|
||||
set 4: 100035 10006f 1000b4 10007b
|
||||
set 5: 10007b 100058 10007a 10006f
|
||||
set 6: 100079 1000a1 10006f 10007a
|
||||
set 7: 100035 1000a1 10007a 1000b3
|
||||
set 8: 10007b 10007a 1000b4 1000a1
|
||||
set 9: 10007a 10006f 100079 10007b
|
||||
set 10: 1000b2 1000ad 1000ae 10007a
|
||||
set 11: 10002e 1000b2 1000a9 10007a
|
||||
set 12: 1ec0cf 1000a9 100035 10007a
|
||||
set 13: 10007a 1000ad 1ec0cf 10006f
|
||||
set 14: 1000b2 1000b3 1000ad 10007a
|
||||
set 15: 10007a 1000ad 1000b2 1000b3
|
||||
set 16: 10006f 1000b3 1000b0 1000ad
|
||||
set 17: 1000b2 1000b1 1000ad 1000af
|
||||
set 18: 1000b1 1000b3 1000b2 1000ad
|
||||
set 19: 1000ab 1000b3 1000ad 1ec0cf
|
||||
set 20: 1000b3 1000ad 1000aa 10007a
|
||||
set 21: 1000ad 1000b2 100008 10007a
|
||||
set 22: 1ec0cf 10007a 100008 1000b3
|
||||
set 23: 1000b2 1000b3 100064 1ec0cf
|
||||
set 24: 1000b0 1000a0 1000af 100077
|
||||
set 25: 1000ab 1000b1 1000b2 1000b0
|
||||
set 26: 10004e 1000b3 100031 10004c
|
||||
set 27: 1000b3 1ec0cf 10004e 100031
|
||||
set 28: 10007a 1000b0 1000af 1000a0
|
||||
set 29: 1ec0ce 1000b0 10007a 1000b3
|
||||
set 30: 1000b3 1ec0ce 1000b1 1000b2
|
||||
set 31: 100074 1000b3 100077 1000b1
|
||||
|
||||
====== Simulation results (raw) ======
|
||||
a. number of L1 reads: 70107
|
||||
b. number of L1 read misses: 4739
|
||||
c. number of L1 writes: 29893
|
||||
d. number of L1 write misses: 6850
|
||||
e. L1 miss rate: 0.1159
|
||||
f. number of writebacks from L1: 0
|
||||
g. total memory traffic: 34632
|
||||
|
||||
==== Simulation results (performance) ====
|
||||
1. average access time: 2.8532 ns
|
||||
86
cache/TJU-2023-Computer-Organization/Proj1-1/Proj1-1/validation/ValidationRun4.txt
vendored
Normal file
86
cache/TJU-2023-Computer-Organization/Proj1-1/Proj1-1/validation/ValidationRun4.txt
vendored
Normal file
|
|
@ -0,0 +1,86 @@
|
|||
===== Simulator configuration =====
|
||||
L1_BLOCKSIZE: 64
|
||||
L1_SIZE: 8192
|
||||
L1_ASSOC: 2
|
||||
L1_REPLACEMENT_POLICY: 1
|
||||
L1_WRITE_POLICY: 0
|
||||
trace_file: gcc_trace.txt
|
||||
===================================
|
||||
|
||||
===== L1 contents =====
|
||||
set 0: 40033 D 7b035 D
|
||||
set 1: 40056 D 40033 D
|
||||
set 2: 7b035 D 4001f
|
||||
set 3: 40056 D 40055 D
|
||||
set 4: 40055 D 40056 D
|
||||
set 5: 40056 D 7b035 D
|
||||
set 6: 42355 4001f
|
||||
set 7: 4003f D 40056 D
|
||||
set 8: 40038 D 40056 D
|
||||
set 9: 40048 40038 D
|
||||
set 10: 40029 40001
|
||||
set 11: 4001f 40001
|
||||
set 12: 40001 4001f
|
||||
set 13: 40001 40051 D
|
||||
set 14: 40031 D 40051 D
|
||||
set 15: 40035 D 40051 D
|
||||
set 16: 40051 D 40031
|
||||
set 17: 40051 D 40031
|
||||
set 18: 4002f 40031
|
||||
set 19: df8 4001f
|
||||
set 20: 4001f 40036 D
|
||||
set 21: 4001f 40027
|
||||
set 22: 40027 4003e
|
||||
set 23: 40027 40051 D
|
||||
set 24: 4002a D 4001f
|
||||
set 25: df8 40044 D
|
||||
set 26: 40051 D 4003e D
|
||||
set 27: 40037 D 40051 D
|
||||
set 28: 40051 D 4002f D
|
||||
set 29: 40035 D 40051 D
|
||||
set 30: 40051 D 40035
|
||||
set 31: 40055 D 40051 D
|
||||
set 32: 40136 D 4003e D
|
||||
set 33: 40035 D 40051 D
|
||||
set 34: 40051 D 40055 D
|
||||
set 35: 40035 D 40051 D
|
||||
set 36: 40138 D 7b033 D
|
||||
set 37: 7b033 D 40042 D
|
||||
set 38: 40051 D 40055 D
|
||||
set 39: 40051 D 40055 D
|
||||
set 40: 7b033 D 40051 D
|
||||
set 41: 40051 D 40055 D
|
||||
set 42: 40051 D 40055 D
|
||||
set 43: 40051 D 40055 D
|
||||
set 44: 40051 D 40055 D
|
||||
set 45: 40055 D 40051 D
|
||||
set 46: 40051 D 40031 D
|
||||
set 47: 40051 D 40031 D
|
||||
set 48: 40051 D 40055 D
|
||||
set 49: 40055 D 40051 D
|
||||
set 50: 7b034 D 40051 D
|
||||
set 51: 7b034 D 4003e D
|
||||
set 52: 40054 D 40055 D
|
||||
set 53: 7b034 D 40035
|
||||
set 54: 4003f D 40055 D
|
||||
set 55: 40036 D 40055 D
|
||||
set 56: 40055 D 40039
|
||||
set 57: 40022 D 4003e D
|
||||
set 58: 40031 D 40047
|
||||
set 59: 40047 40055 D
|
||||
set 60: 40047 7b034 D
|
||||
set 61: 7b034 D 40047
|
||||
set 62: 4001e 40031 D
|
||||
set 63: 4001c 40032 D
|
||||
|
||||
====== Simulation results (raw) ======
|
||||
a. number of L1 reads: 63640
|
||||
b. number of L1 read misses: 3492
|
||||
c. number of L1 writes: 36360
|
||||
d. number of L1 write misses: 2096
|
||||
e. L1 miss rate: 0.0559
|
||||
f. number of writebacks from L1: 2415
|
||||
g. total memory traffic: 8003
|
||||
|
||||
==== Simulation results (performance) ====
|
||||
1. average access time: 1.6684 ns
|
||||
30
cache/TJU-2023-Computer-Organization/Proj1-1/Proj1-1/validation/ValidationRun5.txt
vendored
Normal file
30
cache/TJU-2023-Computer-Organization/Proj1-1/Proj1-1/validation/ValidationRun5.txt
vendored
Normal file
|
|
@ -0,0 +1,30 @@
|
|||
===== Simulator configuration =====
|
||||
L1_BLOCKSIZE: 32
|
||||
L1_SIZE: 1024
|
||||
L1_ASSOC: 4
|
||||
L1_REPLACEMENT_POLICY: 1
|
||||
L1_WRITE_POLICY: 1
|
||||
trace_file: go_trace.txt
|
||||
===================================
|
||||
|
||||
===== L1 contents =====
|
||||
set 0: 4004e0 400321 40040d 4004e1
|
||||
set 1: 4004e0 4004e1 40040d 4004df
|
||||
set 2: 4004df 4004e1 40040d 4004e0
|
||||
set 3: 4004e1 4004e0 4004df 40040d
|
||||
set 4: 4004e1 4008b3 40040d 400652
|
||||
set 5: 4004e0 4004df 400320 40040c
|
||||
set 6: 4004df 40040c 4004e0 4004de
|
||||
set 7: 40040c 4004df 4004e0 400320
|
||||
|
||||
====== Simulation results (raw) ======
|
||||
a. number of L1 reads: 60613
|
||||
b. number of L1 read misses: 4893
|
||||
c. number of L1 writes: 39387
|
||||
d. number of L1 write misses: 33648
|
||||
e. L1 miss rate: 0.3854
|
||||
f. number of writebacks from L1: 0
|
||||
g. total memory traffic: 44280
|
||||
|
||||
==== Simulation results (performance) ====
|
||||
1. average access time: 8.4985 ns
|
||||
|
|
@ -0,0 +1,14 @@
|
|||
1. Download all the source files (.cc, .h) plus the Makefile to your own directory. (To download, click on the link with your right mouse button and select "Save Link As...".)
|
||||
2. "make" (this will create the binary, sim_cache)
|
||||
3. Try running "sim_cache" with any number of arguments. It will simply print "Hello World!" and then echo all the arguments back to you. For example, try this example from the Project 1 spec:
|
||||
./sim_cache 32 8192 4 0 1 gcc_trace.txt
|
||||
4. "make clean" (this will remove all .o files and the binary sim_cache)
|
||||
5. "make" (build again)
|
||||
6. "make clobber" (this will remove only .o files, leaving the binary sim_cache)
|
||||
---------------------------------------------------------------------
|
||||
You only need the Makefile from this directory. (The other bogus .cc/.h files are merely there as an example.)
|
||||
What you need to modify in the Makefile for your own needs:
|
||||
1. In the Makefile, replace all the .cc filenames with your .cc filenames, on the line labeled SIM_SRC. You can use as few or as many .cc files as you want.
|
||||
2. Likewise, update the names of .o files in the Makefile, on the line labeled SIM_OBJ. There must be a corresponding .o file for every .cc file.
|
||||
----------------------------------------------------------------------
|
||||
If you are using a different language/compiler, replace CC with your preferred compiler. You may also need to modify the default CFLAGS, depending on what other arguments your compiler requires. Also, if you use a different language, then you may need to change the .cc extensions to something else.
|
||||
Binary file not shown.
|
|
@ -0,0 +1,11 @@
|
|||
Proj1-2文件夹下包含了“实验一：Cache存储体系设计”第2部分（Advanced Cache）所需的全部材料：
|
||||
|
||||
trace：包含实验所需的所有trace文件，即读/写访存地址流
|
||||
|
||||
validation：包含了所有仿真结果验证文件
|
||||
|
||||
debug：包含了所有仿真器调试文件
|
||||
|
||||
Proj1-2_Specification：实验指导书
|
||||
|
||||
checklist.pdf:自查文件
|
||||
|
|
@ -0,0 +1,11 @@
|
|||
Proj1-2文件夹下包含了“实验一：Cache存储体系设计”第2部分（Advanced Cache）所需的全部材料：
|
||||
|
||||
trace：包含实验所需的所有trace文件，即读/写访存地址流
|
||||
|
||||
validation：包含了所有仿真结果验证文件
|
||||
|
||||
debug：包含了所有仿真器调试文件
|
||||
|
||||
Proj1-2_Specification：实验指导书
|
||||
|
||||
checklist.pdf:自查文件
|
||||
Binary file not shown.
3281
cache/TJU-2023-Computer-Organization/Proj1-2/Proj1-2/debug/DebugRun10_v2.txt
vendored
Normal file
3281
cache/TJU-2023-Computer-Organization/Proj1-2/Proj1-2/debug/DebugRun10_v2.txt
vendored
Normal file
File diff suppressed because it is too large
Load Diff
Some files were not shown because too many files have changed in this diff Show More
Loading…
Reference in New Issue