phytium-vsipl/Makefile

38 lines
737 B
Makefile

TARGET = radar
CC = cc
PY = python3
# 注意库的位置
INC_DIR = -I./include -I./src -I../vsipl/include
LIB_DIR = -L./vsipl/lib
LIBS = -lvsip -lfftw3f -lm
CFLAGS = $(INC_DIR) $(LIB_DIR) $(LIBS) -g
SRC = $(wildcard src/*.c)
OBJ = $(patsubst src/%.c, obj/%.o, $(SRC))
# 检查系统架构
ARCH := $(shell uname -m)
ifeq ($(ARCH), x86_64)
BIN_DIR = bin/x86
else ifeq ($(ARCH), armv7l)
BIN_DIR = bin/arm
else ifeq ($(ARCH), aarch64)
BIN_DIR = bin/arm
else
BIN_DIR = bin/unknown
endif
$(TARGET): $(OBJ)
@mkdir -p $(BIN_DIR)
@$(CC) $(OBJ) $(CFLAGS) -o $(BIN_DIR)/$(TARGET)
obj/%.o: src/%.c include/*.h
@mkdir -p obj
@$(CC) -c $< $(CFLAGS) -o $@
all: $(TARGET)
clean:
rm -f $(BIN_DIR)/$(TARGET) $(OBJ)
rm -rf obj